KR970030820A - Wiring layer formation method of a semiconductor device - Google Patents

Wiring layer formation method of a semiconductor device Download PDF

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Publication number
KR970030820A
KR970030820A KR1019950040738A KR19950040738A KR970030820A KR 970030820 A KR970030820 A KR 970030820A KR 1019950040738 A KR1019950040738 A KR 1019950040738A KR 19950040738 A KR19950040738 A KR 19950040738A KR 970030820 A KR970030820 A KR 970030820A
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KR
South Korea
Prior art keywords
forming
polycrystalline silicon
film
silicon film
insulating film
Prior art date
Application number
KR1019950040738A
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Korean (ko)
Inventor
이권재
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950040738A priority Critical patent/KR970030820A/en
Publication of KR970030820A publication Critical patent/KR970030820A/en

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Abstract

반도체 장치에 있어서 이중층 구조의 도전막으로 구성된 배선층의 형성방법이 개시되었다. 본 발명은 질소가 주입된 다결정 실리콘막을 도펀트가 주입된 다결정 실리콘막의 상부 또는 하부에 형성한 이중층 구조이 도전막으로 구성된 배선층의 형성방법을 제공한다. 본 발명에 의하여 후속 열처리 공정에 의하여 도펀트가 주입된 다결정 실리콘막 내의 도펀트가 밖으로 확산하는 것을 방지하여 전기적 특성을 향상시켰다.A method of forming a wiring layer composed of a conductive film of a double layer structure in a semiconductor device has been disclosed. The present invention provides a method for forming a wiring layer in which a double layer structure in which a polycrystalline silicon film into which a nitrogen is injected is formed on or under a polycrystalline silicon film into which a dopant is injected is formed of a conductive film. According to the present invention, the dopant in the polycrystalline silicon film into which the dopant is implanted is prevented from diffusing out by a subsequent heat treatment process, thereby improving electrical characteristics.

Description

반도체 장치의 배선층 형성방법Wiring layer formation method of a semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 종래의 배선층 형성방법을 설명하기 위한 단면도이다.1 is a cross-sectional view for explaining a conventional wiring layer forming method.

Claims (3)

반도체 기판; 상기 반도체 기판 상에 절연막을 형성하는 단계; 상기 반도체 기판의 소정 영역을 노출시키는 콘택홀을 갖는 절연막 패턴을 형성하는 단계;, 상기 결과물 전면에 증착되어 상기 콘택홀을 통하여 상기 반도체기판과 접촉되는 질소가 주입된 제1 다결정 실리콘막을 형성하는 단계; 및 상기 제1 다결정 실리콘막상에 도펀트가 주입된 제2 다결정 실리콘막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 장치의 배선층 형성방법.Semiconductor substrates; Forming an insulating film on the semiconductor substrate; Forming an insulating film pattern having a contact hole exposing a predetermined region of the semiconductor substrate, and forming a first polycrystalline silicon film deposited on the entire surface of the resultant and implanted with nitrogen in contact with the semiconductor substrate through the contact hole; ; And forming a second polycrystalline silicon film implanted with a dopant on the first polycrystalline silicon film. 반도체 기판; 상기 반도체 기판상에 제1 절연막을 형성하는 단계; 상기 제1 절연막 상에 도전막을 형성하는 단계; 상기 도전막 상에 제2 절연막을 형성하는 단계; 상기 도전막의 소정 영역을 노출시키는 콘택홀을 갖는 제2 절연막 패턴을 형성하는 단계; 상기 결과물 전면에 증착되어 상기 콘택홀을 통하여 상기 도전막과 접촉되는 질소가 주입된 제1 다결정 실리콘막을 형성하는 단계; 및 상기 제1 다결정 실리콘막상에 도펀트가 주입된 제2 다결정 실리콘막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 장치의 배선층 형성방법.Semiconductor substrates; Forming a first insulating film on the semiconductor substrate; Forming a conductive film on the first insulating film; Forming a second insulating film on the conductive film; Forming a second insulating film pattern having a contact hole exposing a predetermined region of the conductive film; Forming a first polycrystalline silicon film deposited on the entire surface of the resultant and implanted with nitrogen contacting the conductive film through the contact hole; And forming a second polycrystalline silicon film implanted with a dopant on the first polycrystalline silicon film. 반도체 기판; 상기 반도체 기판상에 제1 절연막을 형성하는 단계; 상기 제1 절연막 상에 도펀트가 주입된 제1 다결정 실리콘막을 형성하는 단계; 상기 제1 다결정 실리콘막 상에 질소가 주입된 제2 다결정 실리콘막을 형성하는 단계; 상기 제2 다결정 실리콘막 상에 제2 절연막을 형성하는 단계; 상기 제2 다결정 실리콘막의 소정 영역을 노출시키는 콘택홀을 갖는 제2 절연막으로 구성된 절연막 패턴을 형성하는 단계; 및 상기 결과물 전면에 증착되어 상기 콘택홀을 통하여 상기 제2 다결정 실리콘막과 접촉되는 도전막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 장치의 배선층 형성방법.Semiconductor substrates; Forming a first insulating film on the semiconductor substrate; Forming a first polycrystalline silicon film implanted with a dopant on the first insulating film; Forming a second polycrystalline silicon film implanted with nitrogen on the first polycrystalline silicon film; Forming a second insulating film on the second polycrystalline silicon film; Forming an insulating film pattern composed of a second insulating film having a contact hole exposing a predetermined region of the second polycrystalline silicon film; And forming a conductive film deposited on the entire surface of the resultant material and in contact with the second polycrystalline silicon film through the contact hole. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950040738A 1995-11-10 1995-11-10 Wiring layer formation method of a semiconductor device KR970030820A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950040738A KR970030820A (en) 1995-11-10 1995-11-10 Wiring layer formation method of a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950040738A KR970030820A (en) 1995-11-10 1995-11-10 Wiring layer formation method of a semiconductor device

Publications (1)

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KR970030820A true KR970030820A (en) 1997-06-26

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KR1019950040738A KR970030820A (en) 1995-11-10 1995-11-10 Wiring layer formation method of a semiconductor device

Country Status (1)

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KR (1) KR970030820A (en)

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