KR970023786A

KR970023786A - Polishing method of silicon on insulator (SOI) wafer

Info

Publication number: KR970023786A
Application number: KR1019950036458A
Authority: KR
Inventors: 이병훈; 강치중; 박규찬
Original assignee: 김광호; 삼성전자 주식회사
Priority date: 1995-10-20
Filing date: 1995-10-20
Publication date: 1997-05-30

Abstract

실리콘 온 인슐레이터(SOI) 웨이퍼의 두께를 균일하게 제조할 수 있는 연마방법에 대해 기재되어 있다. 이는 웨이퍼 직접 본딩방법에 의해 본딩된 SOI 웨이퍼의 연마시, 공정진행 정도에 따라 서로 다른 특성을 갖는 연마액을 다단계로 사용하여 연마하는 것을 특징으로 한다. 그 일예로는, 높은식각 선택비를 얻기 위해 슬러리를 400:1로 희석하여 연마하는 제1단계와, 낮은 선택비로 실리콘 잔류물을 제거하기 위해 100:1로 희석된 슬러리로 연 마하는 제2단계로 나누어 진행된다. 따라서, 실리콘은 인슐레이터의 두께를 균일하게 제조할 수 있으며, 공정시간을 단축할 수 있다.A polishing method capable of uniformly producing a thickness of a silicon on insulator (SOI) wafer is described. This is characterized in that when polishing the SOI wafer bonded by the wafer direct bonding method, polishing liquids having different characteristics depending on the progress of the process are polished in multiple stages. For example, a first step of diluting the slurry by diluting 400: 1 to obtain a high etch selectivity and a second polishing of a slurry diluted to 100: 1 to remove silicon residue at a low selectivity It is divided into steps. Therefore, the silicon can be produced uniformly in the thickness of the insulator, it is possible to shorten the process time.

Description

Polishing method of silicon on insulator (SOI) wafer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 의한 실리콘 온 인슐레이터(SOI) 웨이퍼의 연마방법을 설명하기 위한 단면도이다.2 is a cross-sectional view for explaining a method of polishing a silicon on insulator (SOI) wafer according to the present invention.

제3A도 및 제3B도는 실리콘 온 인슐레이터(SOI) 웨이퍼의 연마방법을 설명하기 위하여, 연마시간에 따라 연마율의 변화를 도시한 그래프이다.3A and 3B are graphs showing a change in polishing rate according to polishing time in order to explain a polishing method of a silicon on insulator (SOI) wafer.

Claims

A method of polishing a silicon on insulator (SOI) wafer, wherein the polishing of the SOI wafer bonded by the wafer integrated bonding method is performed by using polishing liquids having different characteristics depending on the progress of the process in multiple stages.

The method of claim 1, wherein the concentration of the abrasive (abrasive) contained in the slurry in order to control the properties of the polishing liquid, silicon on insulator (SOI) wafer polishing method.

The method of claim 2, wherein the concentration of the abrasive is controlled by a method of adjusting the effective concentration of the abrasive by dilution of the slurry with water or by changing chemical properties. .

2. The silicon on insulator (SOI) according to claim 1, wherein the dilution ratio or chemical property of the polishing liquid is changed continuously or discontinuously in accordance with the area ratio of silicon and oxide film which varies with polishing progress. Wafer polishing method.

The method of polishing a silicon on insulator (SOI) wafer according to claim 1, wherein the dilution ratio of the slurry is increased before the oxide film under the silicon is exposed, and the dilution ratio of the slurry is lowered after the oxide film is exposed.

6. The polishing of a silicon on insulator (SOI) wafer according to claim 5, wherein the concentration of the abrasive before the oxide film is exposed is maintained at 0.2% or less with a weight ratio substrate, and is changed to 0.2% or more after the oxide film is exposed. Way.

The method of claim 1, wherein the polishing process comprises a first step of diluting the slurry to 400: 1 to obtain a high etching selectivity and a slurry diluted to 100: 1 to remove silicon residue at a low selectivity. A method of polishing a silicon on insulator (SOI) wafer, characterized in that the process is divided into a second step of polishing.

※ Note: The disclosure is based on the initial application.