KR970018571A - Capacitor Manufacturing Method of Semiconductor Memory Device - Google Patents
Capacitor Manufacturing Method of Semiconductor Memory Device Download PDFInfo
- Publication number
- KR970018571A KR970018571A KR1019950031081A KR19950031081A KR970018571A KR 970018571 A KR970018571 A KR 970018571A KR 1019950031081 A KR1019950031081 A KR 1019950031081A KR 19950031081 A KR19950031081 A KR 19950031081A KR 970018571 A KR970018571 A KR 970018571A
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- KR
- South Korea
- Prior art keywords
- capacitor
- lower electrode
- memory device
- semiconductor memory
- hsg
- Prior art date
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- Semiconductor Memories (AREA)
Abstract
플라즈마 처리를 이용한 반도체장치의 캐패시터 제조방법을 개시한다. 본 발명은 하부전극의 표면적 증가를 도모한 HSG(Hemi-Spherical Grainde) 공정을 이용한 반도체 메모리 장치의 캐패시터를 제조하는 방법에 있어서, 상기 캐패시터의 하부전극 물질인 비정질 실리콘(amorphous-Si)의 전표면에 걸쳐 인위적인 손상(damage)를 주어 표면 Si의 결정화 온도를 낮춤으로써 캐패시터의 표면적 증가를 도모한 저온 HSG 공정을 이용한다.A method of manufacturing a capacitor of a semiconductor device using a plasma process is disclosed. The present invention relates to a method of manufacturing a capacitor of a semiconductor memory device using a Hemi-Spherical Grainde (HSG) process aimed at increasing the surface area of a lower electrode, wherein the entire surface of amorphous silicon (amorphous-Si) which is a lower electrode material of the capacitor is used. The low temperature HSG process is used to increase the surface area of the capacitor by artificially damaging the surface and lowering the crystallization temperature of the surface Si.
상기 하부전극의 표면에 인위적으로 손상(damage)을 주는 방법으로 10~500 와트의 Ar, H2, Cl2, HBr 및 CHF3중의 어느 하나의 가스를 사용하는 플라즈마 처리방법을 사용한다.As a method of artificially damaging the surface of the lower electrode, a plasma treatment method using any one of 10 to 500 watts of Ar, H 2 , Cl 2 , HBr, and CHF 3 is used.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1(a)도 내지 제1(d)도는 본 발명의 제1실시예에 의한 하부전극의 표면적 증가방법을 순차적으로 도시한 공정단면도이다.1 (a) to 1 (d) are process cross-sectional views sequentially illustrating a method of increasing the surface area of a lower electrode according to the first embodiment of the present invention.
Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950031081A KR970018571A (en) | 1995-09-21 | 1995-09-21 | Capacitor Manufacturing Method of Semiconductor Memory Device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950031081A KR970018571A (en) | 1995-09-21 | 1995-09-21 | Capacitor Manufacturing Method of Semiconductor Memory Device |
Publications (1)
Publication Number | Publication Date |
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KR970018571A true KR970018571A (en) | 1997-04-30 |
Family
ID=66616185
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950031081A KR970018571A (en) | 1995-09-21 | 1995-09-21 | Capacitor Manufacturing Method of Semiconductor Memory Device |
Country Status (1)
Country | Link |
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KR (1) | KR970018571A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100338848B1 (en) * | 1998-02-03 | 2002-05-30 | 가네꼬 히사시 | Fabrication method of semiconductor device with hsg configuration |
-
1995
- 1995-09-21 KR KR1019950031081A patent/KR970018571A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100338848B1 (en) * | 1998-02-03 | 2002-05-30 | 가네꼬 히사시 | Fabrication method of semiconductor device with hsg configuration |
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