KR970011675B1 - Method of manufacturing dram capacitor - Google Patents

Method of manufacturing dram capacitor Download PDF

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Publication number
KR970011675B1
KR970011675B1 KR93030479A KR930030479A KR970011675B1 KR 970011675 B1 KR970011675 B1 KR 970011675B1 KR 93030479 A KR93030479 A KR 93030479A KR 930030479 A KR930030479 A KR 930030479A KR 970011675 B1 KR970011675 B1 KR 970011675B1
Authority
KR
South Korea
Prior art keywords
forming
film
polysilicon
electrode
region
Prior art date
Application number
KR93030479A
Other languages
Korean (ko)
Other versions
KR950021630A (en
Inventor
Sang-Hoon Park
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Priority to KR93030479A priority Critical patent/KR970011675B1/en
Priority to US08/365,344 priority patent/US5536671A/en
Priority to JP6327619A priority patent/JP2620529B2/en
Publication of KR950021630A publication Critical patent/KR950021630A/en
Application granted granted Critical
Publication of KR970011675B1 publication Critical patent/KR970011675B1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation

Abstract

The DRAM cell manufacturing method comprises the steps of: forming multiple MOSFETs consisting of source/drain region, gate oxide and gate electrode on a silicon substrate; successively forming an isolation oxide film, a nitride film and a flattening isolation film; forming a contact hole of which source/drain region is exposed to a prescribed bit line contact region; forming a bit line where the contact hole is filled with polysilicon film; depositing polysilicon on the whole region and forming a polysilicon film by etching process using a storing electrode mask; forming a storing electrode by depositing polysilicon on the whole region and forming a polysilicon film by etching process using a storing electrode mask, which separates neighbored cells; and forming a dielectric film and plate electrode on the top of the storing electrode.
KR93030479A 1993-12-28 1993-12-28 Method of manufacturing dram capacitor KR970011675B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR93030479A KR970011675B1 (en) 1993-12-28 1993-12-28 Method of manufacturing dram capacitor
US08/365,344 US5536671A (en) 1993-12-28 1994-12-28 Method for fabricating capacitor of a semiconductor device
JP6327619A JP2620529B2 (en) 1993-12-28 1994-12-28 Manufacturing method of Dealam capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93030479A KR970011675B1 (en) 1993-12-28 1993-12-28 Method of manufacturing dram capacitor

Publications (2)

Publication Number Publication Date
KR950021630A KR950021630A (en) 1995-07-26
KR970011675B1 true KR970011675B1 (en) 1997-07-14

Family

ID=19373487

Family Applications (1)

Application Number Title Priority Date Filing Date
KR93030479A KR970011675B1 (en) 1993-12-28 1993-12-28 Method of manufacturing dram capacitor

Country Status (1)

Country Link
KR (1) KR970011675B1 (en)

Also Published As

Publication number Publication date
KR950021630A (en) 1995-07-26

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