KR970010822U - 스테이트 머신 버스 제어장치 - Google Patents
스테이트 머신 버스 제어장치Info
- Publication number
- KR970010822U KR970010822U KR2019950023174U KR19950023174U KR970010822U KR 970010822 U KR970010822 U KR 970010822U KR 2019950023174 U KR2019950023174 U KR 2019950023174U KR 19950023174 U KR19950023174 U KR 19950023174U KR 970010822 U KR970010822 U KR 970010822U
- Authority
- KR
- South Korea
- Prior art keywords
- state machine
- bus control
- machine bus
- control
- state
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1684—Details of memory controller using multiple buses
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1689—Synchronisation and timing concerns
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
- G06F13/4256—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus using a clocked protocol
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019950023174U KR200178427Y1 (ko) | 1995-08-30 | 1995-08-30 | 스테이트 머신 버스 제어장치 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019950023174U KR200178427Y1 (ko) | 1995-08-30 | 1995-08-30 | 스테이트 머신 버스 제어장치 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR970010822U true KR970010822U (ko) | 1997-03-29 |
| KR200178427Y1 KR200178427Y1 (ko) | 2000-05-01 |
Family
ID=19422246
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019950023174U KR200178427Y1 (ko) | 1995-08-30 | 1995-08-30 | 스테이트 머신 버스 제어장치 |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR200178427Y1 (ko) |
-
1995
- 1995-08-30 KR KR2019950023174U patent/KR200178427Y1/ko not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR200178427Y1 (ko) | 2000-05-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E701 | Decision to grant or registration of patent right | ||
| REGI | Registration of establishment | ||
| FPAY | Annual fee payment |
Payment date: 20100121 Year of fee payment: 11 |
|
| EXPY | Expiration of term |