KR970009969B1 - Data output device of semiconductor - Google Patents
Data output device of semiconductor Download PDFInfo
- Publication number
- KR970009969B1 KR970009969B1 KR93028138A KR930028138A KR970009969B1 KR 970009969 B1 KR970009969 B1 KR 970009969B1 KR 93028138 A KR93028138 A KR 93028138A KR 930028138 A KR930028138 A KR 930028138A KR 970009969 B1 KR970009969 B1 KR 970009969B1
- Authority
- KR
- South Korea
- Prior art keywords
- output
- data
- high potential
- signal
- control means
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
Landscapes
- Logic Circuits (AREA)
- Dram (AREA)
Abstract
a data input part for AND operation of data output enable signal and output data; an inverting part generating two inverted signals according to the output signal of the data input part; a power source potential control part maintaining the power source potential for the time set by one of the output signals of the inverting part; a high potential translator generating high potential according to the other output signal of the inverting part; a high potential transfer control means controlling the high potential transfer according to the output signal from the high potential translator and the inverting part; a low potential transfer control means generating a control signal according to the data output enable signal and the output data; and an output buffer outputting data according to the control signal of the power source potential control part, the high potential transfer control means and the low potential transfer control means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR93028138A KR970009969B1 (en) | 1993-12-17 | 1993-12-17 | Data output device of semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR93028138A KR970009969B1 (en) | 1993-12-17 | 1993-12-17 | Data output device of semiconductor |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950021546A KR950021546A (en) | 1995-07-26 |
KR970009969B1 true KR970009969B1 (en) | 1997-06-19 |
Family
ID=19371363
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR93028138A KR970009969B1 (en) | 1993-12-17 | 1993-12-17 | Data output device of semiconductor |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970009969B1 (en) |
-
1993
- 1993-12-17 KR KR93028138A patent/KR970009969B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR950021546A (en) | 1995-07-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20090922 Year of fee payment: 13 |
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LAPS | Lapse due to unpaid annual fee |