KR970007699A - Game machine using multiple processors - Google Patents

Game machine using multiple processors Download PDF

Info

Publication number
KR970007699A
KR970007699A KR1019950023524A KR19950023524A KR970007699A KR 970007699 A KR970007699 A KR 970007699A KR 1019950023524 A KR1019950023524 A KR 1019950023524A KR 19950023524 A KR19950023524 A KR 19950023524A KR 970007699 A KR970007699 A KR 970007699A
Authority
KR
South Korea
Prior art keywords
input
processor
input signal
game
signal
Prior art date
Application number
KR1019950023524A
Other languages
Korean (ko)
Other versions
KR100234251B1 (en
Inventor
방경일
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950023524A priority Critical patent/KR100234251B1/en
Publication of KR970007699A publication Critical patent/KR970007699A/en
Application granted granted Critical
Publication of KR100234251B1 publication Critical patent/KR100234251B1/en

Links

Classifications

    • A—HUMAN NECESSITIES
    • A63—SPORTS; GAMES; AMUSEMENTS
    • A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
    • A63F13/00—Video games, i.e. games using an electronically generated display having two or more dimensions
    • A63F13/90—Constructional details or arrangements of video game devices not provided for in groups A63F13/20 or A63F13/25, e.g. housing, wiring, connections or cabinets
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/28—Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Processing (AREA)

Abstract

본 발명은 복수개의 프로세서를 이용한 게임기에 관한 것으로서, 각 입력장치로부터 들어오는 입력신호들간의 우선순위를 결정하기 위한 입력신호중재기 ; 1개의 입력장치당 1개의 프로세서가 할당되어 각 입력장치로부터 들어오는 입력신호와 우선순위신호를 입력으로 하여 각 프로세서가 담당한 게임캐릭터의 동작을 결정한 후, 그에 따른 화상처리를 수행하기 위한 복수개의 입력신호처리부 ; 복수개의 입력신호처리부에 서출력되는 화소값을 합성하여 최종 화소값을 결정하기 위한화소합성기 ; 및 화소합성기에서 출력되는 최종 화소값을 디스플레이하기 위한 화면표시장치로 구성된다. 따라서, 대전형게임이나 슈팅게임에 있어서 플레이어들이 동등하게 게임을 즐길 수 있도록 하고, 1인 플레이어용 게임에 있어서도 1개의프로세서는 입력신호에 따른 주인공의 동작을 처리하도록 하고,다른 1개의 프로세서는 입력신호에 따른 배경처리에 사용함으로써 게임 프로그램의 실행속도를 증가시킬 수 있다.The present invention relates to a game machine using a plurality of processors, comprising: an input signal mediator for determining priorities between input signals coming from respective input devices; One processor is allocated to each input device, and the input signal and priority signal from each input device are input to determine the operation of the game character in charge of each processor, and then a plurality of inputs for performing image processing accordingly. Signal processor; A pixel synthesizer for determining final pixel values by synthesizing pixel values output from the plurality of input signal processing units; And a screen display device for displaying the final pixel value output from the pixel synthesizer. Therefore, in a competitive game or a shooting game, players can enjoy the game equally, and even in a single player game, one processor processes the main character's motion according to an input signal, and the other processor inputs. By using it for background processing according to the signal, the execution speed of the game program can be increased.

Description

복수개의 프로세서를 이용한 게임기Game machine using multiple processors

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제4도는 본 발명에 의한 게임기의 구조를 설명하기 위한 블럭도, 제5도는 제4도에 있어서 입력신호 검출에 따른 신호 타이밍도.4 is a block diagram for explaining the structure of a game machine according to the present invention, and FIG. 5 is a signal timing diagram according to input signal detection in FIG.

Claims (3)

2개 이상의 입력장치를 갖는 게임기에 있어서, 상기 각 입력장치로부터 들어오는 입력신호들간의 우선순위를 결정하여 우선순위신호를 출력하기 위한 입력신호중재기 ; 상기 1개의 입력장치당 1개의 프로세서가 할당되어 각 입력장치로부터 들어오는 입력신호와 상기 우선순위신호를 입력으로 하여 각 프로세서가 담당한 게임 캐릭터의 동작을 결정한후, 그에 따른 화상처리를 수행하기 위한 복수개의 입력신호처리부 ; 상기 복수개의 입력신호처리부에서 출력되는 화소값을 합성하여 최종 화소값을 결정하기 위한 화소합성기 ; 및 상기 화소합성기에서 출력되는 최종 화소값을 디스플레이하기 위한 화면표시장치를 포함하는 것을 특징으로 하는 복수개의 프로세서를 이용한 게임기.A game machine having two or more input devices, comprising: an input signal mediator for outputting priority signals by determining priorities between input signals coming from the respective input devices; One processor is allocated to each of the input devices to determine the operation of the game character in charge of each processor by inputting the input signal and the priority signal from each input device, and performing a plurality of image processing accordingly. Input signal processing section; A pixel synthesizer for determining final pixel values by synthesizing pixel values output from the plurality of input signal processing units; And a screen display device for displaying a final pixel value output from the pixel synthesizer. 제1항에 있어서, 상기 입력신호중재기는 상기 입력신호들간의 우선순위를 게 임프로그램에 따라 변경할 수있음을 특징으로 하는 복수개의 프로세서를 이용한 게임기.The game machine according to claim 1, wherein the input signal arbitrator can change the priority of the input signals according to a game program. 2개의 입력장치를 갖는 게임기에 있어서, 상기 각 입력장치로부터 들어오는 입력신호들간의 우선순위를 결정하여 우선순위신호를 출력하기 위한 입력신호중재기 ; 상기 1개의 입력장치당 1개의 프로세서가 할당되어, 1개의 프로세서는 입력신호에 따른 주인공의 동작을 처리하도록 하고, 다른 1개의 프로세서는 입려신호에 따른 배경처리를 수행하도록 결정한 후, 그에 따른 화상처리를 수행하기 위한 2개의 입력신호처리부 ; 상기 2개의 입력신호처리부에서 출력되는 화소값을 합성하여 최종 화소값을 결정하기 위한 화소합성기 ; 및 상기 화소합성기에서 출력되는 최종 화소값을 디스플레이하기 위한 화면표시장치를 포함하는 것을 특징으로 하는 복수개의 프로세서를 이용한 게임기.A game machine having two input devices, comprising: an input signal mediator for determining a priority between input signals coming from each input device and outputting a priority signal; One processor is assigned to each of the input devices so that one processor processes the main character's operation according to the input signal, and the other processor decides to perform the background processing according to the incoming signal, and then the image processing accordingly. Two input signal processing units for performing the operation; A pixel synthesizer for determining final pixel values by synthesizing pixel values output from the two input signal processing units; And a screen display device for displaying a final pixel value output from the pixel synthesizer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950023524A 1995-07-31 1995-07-31 Game machine KR100234251B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950023524A KR100234251B1 (en) 1995-07-31 1995-07-31 Game machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950023524A KR100234251B1 (en) 1995-07-31 1995-07-31 Game machine

Publications (2)

Publication Number Publication Date
KR970007699A true KR970007699A (en) 1997-02-21
KR100234251B1 KR100234251B1 (en) 1999-12-15

Family

ID=19422457

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950023524A KR100234251B1 (en) 1995-07-31 1995-07-31 Game machine

Country Status (1)

Country Link
KR (1) KR100234251B1 (en)

Also Published As

Publication number Publication date
KR100234251B1 (en) 1999-12-15

Similar Documents

Publication Publication Date Title
CA2348261A1 (en) Program product and data processor
KR900015551A (en) Image motion vector detection device
KR960032186A (en) How to Obtain Status Data Without Interrupting Computer System and Program Execution
KR960038583A (en) Output control device
KR970007699A (en) Game machine using multiple processors
JP2021112539A5 (en)
EP0660298A4 (en) Image processing device and method therefor, and game machine having image processing part.
JP2021112542A5 (en)
JP2021112537A5 (en)
JP2021112541A5 (en)
JP2021112543A5 (en)
JP2021112540A5 (en)
JPH08276073A (en) Video game machine
JPH0433670A (en) Display controller for game machine
JP2634168B2 (en) Raster detection control device for scanning display device
SU1083192A1 (en) Variable priority device
JPS60241126A (en) Scroll system for optional pattern of computer
KR960001001Y1 (en) Circuit for multi-various joistic games
JP2021112523A5 (en)
JPS61183745A (en) Interruption control device
JPS5644942A (en) Information processing unit
JP2003058144A (en) Image display controller
JPH0125094B2 (en)
JPS62171037A (en) Termination decision mechanism for variable length stream processing
MY126272A (en) Program product and data processing system

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20070830

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee