KR970004517B1 - Visual simulation apparatus - Google Patents

Abstract

No summary

Description

Visual simulation device

1 is a view showing an embodiment of the present invention.

FIG. 2 is a plan view showing the contents of various windows displayed on the display device shown in FIG.

3 is a plan view showing the configuration of a processor that is simulated by the processor simulation unit shown in FIG.

4 is a flowchart shown for explaining the operation of the apparatus shown in FIG.

5 is a plan view showing the display contents of the display device installed in the conventional simulation device.

* Description of the symbols for the main parts of the drawings *

11: CPU12: keyboard

13 display device 13a: key metrics simulation unit

13c: simulated portion of the liquid crystal display 13d: list display portion

14: mouse 15: magnetic disk device

15: memory 17c: simulator

17d: simulator main part 17e: processor simulation part

17f: processor input and output simulation unit 17g: matrix input and output simulation unit

17h: Simulating display medium 17j: Simulating circuit block

17k: Instrument block simulation unit

[Industrial use]

The present invention relates to a visual simulation device which is applied to the program development of a processor, for example, assembled in an electronic device such as a radio.

[Traditional Technology and Problems]

The program of the processor assembled to the electronic device performs an editing and assembling of a source file on a host computer and then an emulator connected to a target device such as a radio. It is common to download and debug with. However, this was time consuming because it was downloaded to the emulator.

Therefore, by installing a simulation program of the target device on the host computer, it is possible to shorten the time required for downloading, and further shorten the development time because a series of software development operations can be performed on the host computer. It becomes possible.

A simulation apparatus having a simulation program is generally composed mainly of a personal computer or an engineering work station (EWS), and for example, to perform simulation of a target device such as a radio according to a simulation program stored in the EWS. It is. This simulation apparatus is configured to display simulation results on a display device installed in the apparatus, for example, a CRT display device.

5 shows the display contents of the display apparatus installed in the conventional simulation apparatus, which includes the contents (1) of the source list of the processor assembled in the winding machine and the contents of the basic register including the program counter. (2), the memory dump display 3 and the input comment 4 are displayed.

By the way, the conventional simulation apparatus is a simulation for a processor chip, and this simulation is such that, for example, a delay is applied to a signal output from any output terminal and supplied to any input terminal. Accordingly, no peripheral device other than the processor chip, such as a radio, has been able to simulate a peripheral device such as a key matrix or a liquid crystal display in real time. For this reason, the conventional simulation apparatus can only be used at the initial stage of software development, and it is difficult to simulate the operation of the target at the actual level.

[Purpose of invention]

Accordingly, an object of the present invention is to provide a visual simulation apparatus capable of simulating the operation of a target device including a peripheral device in real time, and capable of displaying the simulation result in real time.

[Configuration of Invention]

In order to achieve the above object, the visual simulation apparatus of the present invention includes a processor simulating means for simulating the operation of a processor of a target device according to a program input to the processor, and a processor input / output for simulating a state of an input / output terminal of the processor. Simulating means; matrix input / output simulating means for simulating a state of a key matrix connected to an input terminal of the processor; display medium simulating means for simulating an operation of a display medium for displaying information output from the processor; execution of each of the simulating means Input means for inputting information necessary for the first input; It is the simulated result and a display window in which the second device is set to display the same type as the indicator is installed on the target device.

The visual simulation apparatus further includes processor debug means for debugging the operation of the processor, and the display device further includes a third window for displaying a list of the program and a debug result of the debug means. .

The visual simulation apparatus further includes circuit block simulating means for simulating the operation of the circuit block provided in the target device, and mechanical block simulating means for simulating the operation of the mechanical block provided in the target device.

The visual simulation apparatus further includes an environmental block simulating means for simulating an environmental condition of the target apparatus and an analyzing means for evaluating and analyzing the operation of the target apparatus.

The display device further has a fourth window for displaying at least the contents of registers as a result of the simulation of the processor simulating means.

(Action)

That is, in the present invention configured as described above, when the input means instructs the key matrix provided in the target device displayed on the first window of the display device by the input means, the matrix input / output simulated means, the processor input / output simulated means, the processor simulated means, and the display. The medium simulating means is executed sequentially. This simulation result is displayed in the first to fourth windows of the display device. The third window displays the program, which can be debugged using processor debug tools. In the fourth window, simulation results of the processor simulation means are displayed, and in the first window, simulation results of the processor input / output simulation means and the matrix input / output simulation means are displayed corresponding to the key matrix installed in the target device. The second window is installed in the target device, and the simulation result of the display medium simulating means is displayed in the same format as that of the indicator installed in the target device. Therefore, the operation of the target device can be simulated in real time, and the simulation result can be displayed in real time, so that the operation of the program can be confirmed at the practical level.

(Example)

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a simulation apparatus. The CPU 11 is connected to a CPU 12 for inputting various kinds of information such as a command required for execution of a simulator or a debug unit, and the like. A display device 13 made of a CRT display device for displaying the simulation result processed by 11) is connected. The CPU 11 also stores in a processor (e.g., a 4-bit microcomputer) of a target device such as a mouse 14 as a pointing device for indicating information displayed on the display device 13 and a cassette tape recorder with a radio. The stored magnetic disk devices 15, such as a program to be simulated, are connected to each other.

Further, the CPU 11 is connected with a memory 16 made of RAM (Random Access Memory), for example, an operating system 17a for controlling the entire system, and A window system 17b which executes setting of various windows displayed on the display device 13, display of information in the window, and output of the indicated position information when the information displayed in the window is instructed by the mouse 14 or the like. ) And a simulator 17c for simulating a target device. These operating systems 17a, the window system 17b, and the simulator 17c are usually stored in the magnetic disk device 15, and loaded into the memory 16 from the magnetic disk device 15 at the time of startup of the system, for example. .

2 shows the contents of the various windows displayed on the display device 13, and shows a case of a cassette tape recorder with a radio as a target device.

The window 13a is a key matrix simulation section, in which various switches provided on the operation section of the radio are displayed. That is, the window 13a includes, for example, a power switch POWER, preset music switches M1 to M7, and switches MEMO and FM for storing frequencies corresponding to these preset switches M1 to M7. The band switch (BAND) for switching the broadcast or medium-wave broadcasting, and the up, down switches (UP, DOWN) to sequentially increase or decrease the reception frequency is displayed.

The window 13b is a simulation part of the input / output (I / O) terminal installed in the processor. The window 13b has a medium wave signal (STREO in) for displaying a stereo state and an output state of an FM signal (FM out). (MW out) for indicating the output status of the and (MUTE out) for the mute state during tuning.

The window 13c is a simulation section of the liquid crystal display installed in the radio, and displays display information supplied from the input / output control section included in the processor simulation section 17e to be described later. In this window 13c, for example, the frequency of the selected station is displayed when simulating the operation of the radio, and the running direction of the tape and the like is displayed when simulating the operation of the tape recorder. 2 shows a state in which the frequency of the FM broadcast is displayed by seven segments.

The window 13d is a display section of a program list. The window 13d displays a source program, an assemble list, and the like stored in a ROM (Read Only Memory) section included in the processor simulation section 17e to be described later. The displayed source program can be scrolled, and the displayed program can be debugged.

The window 13e is a display portion of a command, and commands input from the keyboard 12 are sequentially displayed in the window 13c.

The window 13f indicates an operating state of the processor, and the window 13f displays the state of the program counter PC simulated by the processor simulation unit 17e and the various registers R1, R2, ....

The window 13g is a dump display unit that displays the contents stored in the ROM included in the processor simulation unit 17e to be described later. The contents of the ROM are displayed in hexadecimal.

The simulator 17c shown in FIG. 1 is constituted by a plurality of programs. The simulator main unit 17d removes the entire simulation program, and is supplied to various simulation units for explaining the information input by the keyboard 12 or the mouse 14 from the window system 17d. Moreover, the simulator main section 17d supplies the simulation results output from various simulation sections to the window system 17b, and changes the display contents of the display device 13 via the window system 17b. Here, the simulation results output from the various simulation units may be displayed directly from the window system 17b without intervening the simulator main unit 17d.

The processor simulating unit 17e simulates the processor of the cock machine, and as shown in FIG. 3, an Aritual Logical Unit (ALU) 21 included in the processor, a ROM 22 (Read Only Memory), and a RAM 23. And the input / output control unit 24 and the like are simulated according to the information supplied from the simulator main unit 17d and the program of the target device.

The processor I / O simulating unit 17f simulates the state of the I / O terminals installed in the processor of the target device. The processor I / O simulating unit 17f is a high level or a low level according to the result of the matrix I / O simulating unit 17g described below. Set to display.

The matrix input / output simulation unit 17g simulates the selection operation of the key matrix connected to the processor of the target device, that is, the key matrix shown in the second window 13a, for example, the power switch (POWER) or the preset switch (M1 to M). The selection state of M7) is simulated in accordance with the information input via the window system 17b and the simulator main unit 17d according to the operation of the mouse 14.

The display medium simulating unit 17h simulates the display state of a liquid crystal display provided in a target device, for example, a radio. When the display medium simulating unit 17h accesses a storage area of the liquid crystal display provided in the RAM 23, The information stored in this storage area is converted into graphic data for the window system 17B according to the display design of the target device. This data is supplied to the display device 13 via the window system 17b, and the display contents of the liquid crystal display displayed on the window 13c of the display device 13c are switched.

The processor debug unit 17i debugs the operation of the processor. For example, when the mouse is directed to an arbitrary position of the source program and then the program is executed, the execution of the program is stopped at the indicated portion. Then, the contents of the program counter and various registers are displayed on the window 13f at this point to confirm these contents.

The circuit block simulating section 17j simulates the circuit operation of the radio. The circuit block simulating section 17j generates an intermediate frequency signal or generates the local oscillating signal by, for example, mixing a local oscillation signal with a received high frequency signal. Simulates circuit operations such as a PLL circuit.

The instrument block simulating section 17k simulates a mechanical part, and simulates a mechanism having a time delay such as a motor or an electronic plunger used in a tape recorder, for example.

Environment block simulation unit (17 ) Simulates the radio use environment, for example, simulates radio wave conditions according to the distance to the broadcasting station.

The analysis block section 17m is a so-called logic analyzer, for example, simulating the time required for monitoring the output waveform of any circuit or processing a signal.

The verification block unit 17n simulates whether a program or a circuit block operates as designed. For example, when the frequency displayed in the window 13c operates the UP key displayed in the window 13a, It is used to check whether the frequency rises as operated. When performing the verification, for example, the necessary command is input from the keyboard 12 in the form of a program to execute this.

In the above configuration, the simulation of the target device radio will be described with reference to FIG.

In the state of starting the system, the windows 13a, 13b and 13d to 13g of the display device 13 are in a display state as shown in Fig. 2, and the window 13c is in accordance with the function of the target device. Differently, for example, a clock is displayed. In this state, when the cursor of the mouse 14 instructs, for example, the power key POWER displayed on the window 13a, and clicks a switch installed in the mouse 14, the window system 17b. The instruction position is determined by (ST1). This determined indication position is supplied to the simulator main section 17d and to the processor simulating section 17e and the matrix input / output simulating section 17g. The simulator main section 17d supplies a signal to the window system 17b for inverting the display of the power key POWER while the switch of the mouse 14 is pressed. Thus, the display of the power key POWER is inverted black and white by the window system 17b (ST2).

The matrix input / output simulation unit 17g supplies the positional information on the key matrix to the processor input / output simulation unit 17f in accordance with the supplied position on the supplied window 13a (ST3). The processor input / output simulation unit 17f sets the input / output terminal of the processor to which the selected key matrix is connected in correspondence with the supplied position information to a high level. The processor simulation unit 17e reads the type of the key selected from the relation of the set input / output terminals (ST4). Thereafter, the processor simulation unit 17e transmits a signal according to the type of the read key to a simulation unit such as the circuit block simulation unit 17j or the like via the simulator main unit 17d (ST5). Each simulated section executes a simulation in accordance with the supplied signal (ST6).

That is, in this case, since the power key POWER is operated, the processor simulating section 17e sends a power-up command to the circuit block simulating section 17j. The circuit block simulation unit 17j executes the reception process based on the frequency set at the time when the pre-rotation source supplied from the processor simulation unit 17e at the time of power supply is cut off. In addition, the display medium simulating section 17h displays the window 13c according to the frequency set at the time when the rotation source before the supply from the processor simulating section 17e is cut off via the simulator main section 17d. Switch to. That is, the display medium simulating unit 17h writes the rewritten frequency display data when the storage area of the liquid crystal display provided in the RAM 23 is rewritten into the frequency display data at the time when the power is cut off from the clock data. Convert into 7 segment graphic data. The display medium simulation section 17h supplies the converted graphic data and the "MHz" mark to the window system 27. The window system 17b displays the frequency in the window 13c of the display device 13 in accordance with the graphic data and the " MHz " mark as shown in FIG.

In the display state, for example, when the UP key of the window 13a is instructed by the mouse 14, for example, the processor simulated unit 17e performs the circuit block simulated unit 17j via the steps ST1 to ST4. ) Sets the current PLL data, for example, " 1008 " up from " 1007 " The circuit block simulation unit 17j performs automatic tuning in accordance with this set PLL data. In addition, when the current frequency display data stored in the RAM 23 is rewritten from "90.0" to "90.1" by the processor simulating section 17e, the display medium simulating section 17h is executed by the RAM 23. The storage contents input / output is changed into graphic data of 7 segments. This graphic data is displayed in the window 13c via the window system 17b. Thus, the display of the window 13c switches from the current 90.0 MHz to 90.1 MHz. If the up key continues to be instructed, the operation is repeated to instruct the switch displayed in the window 13c, so that various simulator units operate according to the instruction, and the result of the simulation is displayed in each window of the display device 13. Will be displayed.

In addition, in the display state shown in FIG. 2, when the mouse 14 instructs "CALL XXX" of the source program displayed in the window 13d, for example, and executes the program, the processor debug unit 17i returns this. The execution of the program is stopped at the indicated step. At this time, the window 13f displays the contents of the program counter and various registers at this time.

According to the above embodiment, the processor simulating section 17e, the processor input / output simulating section 17f, the matrix input / output section 17g, the display medium simulating section 17h, the circuit block simulating section 17j, and the mechanical block simulating section, etc. The simulation unit is provided so that peripheral devices such as liquid crystal displays can be simulated in real time without being limited to the simulation of the processor. Therefore, it is suitable for soft development because the operation of the target device can be simulated not only at the initial stage of software development but also at all stages.

In addition, the display device 13 displays not only the win program, memory dump display, command input and register display, but also an operation unit and a liquid crystal display device of the target device. Therefore, the simulation results can be directly viewed in real time at the practical level, which is very convenient in practical use for checking the operation of the program.

In addition, in the above embodiment, the number of processors assembled in the target device is one, but the present invention is not limited thereto, and it is possible to simulate even when a plurality of processors are assembled.

The contents and number of windows displayed on the display device 13 are not limited to those shown in FIG. 2 but can be changed as required by the operator.

In addition, of course, it can change in various ways and can implement in the range which does not change the summary of this invention.

It is noted that the reference numerals in the drawings together with the elements of the claims of the present application are for the purpose of facilitating the understanding of the present invention and are not intended to limit the technical gist of the present invention to the embodiments shown in the drawings. .

[Effects of the Invention]

As described above, according to the present invention, it is possible to provide a visual simulation apparatus that can simulate the operation of a target device including a peripheral device in real time, and can display the simulation result in real time.

Claims (5)

Processor simulating means 17e for simulating the operation of a processor of a target device according to a program input to the processor, processor input / output simulating means 17f for simulating a state of an input / output terminal of the processor, and an input terminal of the processor. A matrix input / output simulating unit 17g for simulating the state of the connected key matrix, a display medium simulating unit 17h for simulating the operation of the display medium for displaying information output from the processor, and information necessary for executing the respective simulation means Input means (12, 14) for inputting the first input window (13a, 13b) for displaying the simulation results of the processor input and output simulation unit 17f and the matrix input and output simulation unit 17g and the display device The simulation result of the simulation unit 17h is sent to the target device. The visual simulation device, characterized in that a second window (13c) is set, a display device 13 which is shown by the same type as the indicator deployed. The apparatus of claim 1, further comprising processor debug means (17i) for debugging the operation of said processor, wherein said display device (13) displays a list of said programs and debug results of said debug means (17i). A visual simulation apparatus, further comprising a third window (13d). 2. The apparatus according to claim 1, further comprising circuit block simulating means (17f) for simulating the operation of the circuit block provided in the target device, and mechanical block simulating means (17k) for simulating the operation of the mechanical block installed in the target device. Visual simulation apparatus, characterized in that. The environmental block simulation unit 17 according to claim 1, which simulates an environmental condition of the target device. And an analysis means (17m) for evaluating and analyzing the operation of the target device. The visual simulation apparatus according to claim 1, wherein the display device (13) further comprises a fourth window (13f) for displaying at least the contents of a register as a result of the simulation of the processor simulating means (17e).