KR970003923A

KR970003923A - Capacitor Manufacturing Method

Info

Publication number: KR970003923A
Application number: KR1019950019096A
Authority: KR
Inventors: 김천수
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1995-06-30
Filing date: 1995-06-30
Publication date: 1997-01-29

Abstract

본 발명은 제조공정을 간단히 하면서 동시에 충분한 양의 캐패시턴스를 확보할 수 있는 캐패시터 제조방법에 관한 것으로, 반도체 기판에 트랜지스터, 소자분리막 또는 여타의 소자를 형성한 다음 캐패시터 제조방법에 있어서, 상기 반도체 기판에 상기 소자분리막과 일정정도 겹치도록 트렌치를 형성하는 제1단계; 상기 트렌치의 일측 모서리를 제외한 트렌치 내부 및 소자분리막이 형성되지 않은 활성영역에 절연막을 형성하는 제2단계; 상기 트렌치 측벽에 하부 전하저장전극용 전도막 스페이서를 형성하는 제3단계; 상기 하부 전하저장전극용 전도막 스페이서 표면에 유전막을 형성하는 제4단계; 및 상기 상부 전하저장전극용 전도막을 형성하는 제5단계를 포함하여 이루어지는 것을 특징으로 한다.The present invention relates to a method for manufacturing a capacitor which can simplify a manufacturing process and at the same time ensure a sufficient amount of capacitance. The present invention relates to a method for manufacturing a capacitor, wherein a transistor, an isolation film or other device is formed on a semiconductor substrate. Forming a trench to overlap the device isolation layer to some extent; Forming an insulating film in the trench except for one corner of the trench and in an active region in which the device isolation layer is not formed; Forming a conductive film spacer for a lower charge storage electrode on the sidewalls of the trench; A fourth step of forming a dielectric film on a surface of the conductive film spacer for the lower charge storage electrode; And a fifth step of forming a conductive film for the upper charge storage electrode.

Description

Capacitor Manufacturing Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1E도는 본 발명의 일 실시예에 따른 캐패시터 제조과정을 나타내는 단면도.Figure 1E is a cross-sectional view showing a capacitor manufacturing process according to an embodiment of the present invention.

Claims

A method of manufacturing a capacitor, comprising: forming a transistor, a device isolation film, or other device on a semiconductor substrate, the method comprising: forming a trench in the semiconductor substrate to overlap the device isolation film to some extent; Forming an insulating film in the trench except for one corner of the trench and in an active region in which the device isolation layer is not formed; Forming a conductive film spacer for a lower charge storage electrode on the sidewalls of the trench; A fourth step of forming a dielectric film on a surface of the conductive film spacer for the lower charge storage electrode; And a fifth step of forming a conductive film for the upper charge storage electrode.

The method of claim 1, wherein the second step comprises forming a thin insulating film in a predetermined thickness in an active region inside the trench and in which the device isolation layer is not formed, and filling the contact mask with a photoresist film to remove the insulating film at one edge of the trench. And forming a buried contact mask after etching the insulating film in the exposed region.

3. The trench of claim 2, wherein the third step includes forming a conductive film for the lower charge storage electrode on the entire structure of the first and second structures, and etching back the conductive film by anisotropic etching. Capacitor manufacturing method comprising the step of forming a conductive film spacer for the lower charge storage electrode on the side wall.

4. The method of claim 3, wherein the dielectric film of the fourth step comprises an oxide-nitride-oxide (ONO) dielectric film.

The method of claim 3, wherein the fifth step includes depositing a conductive film for the upper charge storage electrode on the entire structure according to the first to fourth steps and etching the charge outside the charge storage electrode region through a mask etching process. Capacitor manufacturing method comprising the step of removing the conductive film for the storage electrode.

6. The method of claim 3 or 5, wherein the charge storage electrode conductive film is made of an impurity doped polycrystalline silicon film.

※ Note: The disclosure is based on the initial application.