KR970003676A - Metal Barrier Layer Annealing Method of Semiconductor Devices - Google Patents

Metal Barrier Layer Annealing Method of Semiconductor Devices Download PDF

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Publication number
KR970003676A
KR970003676A KR1019950016391A KR19950016391A KR970003676A KR 970003676 A KR970003676 A KR 970003676A KR 1019950016391 A KR1019950016391 A KR 1019950016391A KR 19950016391 A KR19950016391 A KR 19950016391A KR 970003676 A KR970003676 A KR 970003676A
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KR
South Korea
Prior art keywords
barrier layer
annealing
metal barrier
temperature
semiconductor device
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Application number
KR1019950016391A
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Korean (ko)
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KR100192167B1 (en
Inventor
기충호
오태원
염상현
김성철
Original Assignee
김주용
현대전자산업 주식회사
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Publication date
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Priority to KR1019950016391A priority Critical patent/KR100192167B1/en
Publication of KR970003676A publication Critical patent/KR970003676A/en
Application granted granted Critical
Publication of KR100192167B1 publication Critical patent/KR100192167B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76864Thermal treatment

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

1. 청구 범위에 기재된 발명이 속한 기술분야1. TECHNICAL FIELD OF THE INVENTION

반도체 소자의 제조 방법.Method of manufacturing a semiconductor device.

2. 발명이 해결하려과 하는 기술적 과제2. The technical problem to be solved by the invention

질소 가스와 수소 가스를 이용한 종래의 반도체 소자의 금속 장벽층 어닐링 방법은 반응로의 온도를 상승시키는 과정에서의 열손실과 오버 슈트(Over Shoot)로 인한 온도변화를 안정화시키기 위한 시간과 온도를 감소시키는데 소요되는 시간이 많을 뿐만아니라 어닐링 수행시 사용되는 수소 가스는 자체의 폭발 위험성으로 인하여 장비의 잦은 인터록(Interlock)을 발생시키는 문제점을 해결하고자 함.The conventional method of annealing a metal barrier layer of a semiconductor device using nitrogen gas and hydrogen gas reduces the time and temperature for stabilizing the temperature change due to heat loss and overshoot in the process of raising the temperature of the reactor. Not only does it take a long time to solve the problem, but the hydrogen gas used to perform the annealing attempts to solve the problem of frequent interlock of the equipment due to the risk of explosion.

3. 발명의 해결방법의 요지3. Summary of Solution to Invention

반응로의 온도를 소정의 온도로 일정하게 유지하고, 질소 가스 만을 사용하여 어닐링을 실시하고, 또한 질소 퍼지시스템을 이용한 질소 퍼지로 금속 장벽층에서의 자연 산화막 형성을 억제할 수 있는 반도체 소자의 금속 장벽층 어닐링 방법을 제공하고자 함.The metal of the semiconductor device which can keep the temperature of the reactor constant at a predetermined temperature, perform annealing using only nitrogen gas, and suppress the formation of natural oxide film in the metal barrier layer by nitrogen purge using a nitrogen purge system. To provide a barrier layer annealing method.

4. 발명의 중요한 용도4. Important uses of the invention

반도체 소자의 금속 장벽층 어닐링에 이용됨.Used to anneal metal barrier layers in semiconductor devices.

Description

반도체 소자의 금속 장벽층 어닐링 방법Metal Barrier Layer Annealing Method of Semiconductor Devices

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

Claims (3)

질소 퍼지 시스템을 포함하는 CVD 장치를 이용한 반도체 소자의 금속 장벽층 어닐링 방법에 있어서, 반응로의 온도를 소정의 온도로 일정하게 유지시키는 단계와, 반응로에 웨이퍼를 밀어넣고, 소정의 시간동안 질소 가스 분위기의 어닐링을 실시하는 단계 및 상기 금속 장벽층에서의 자연 산화막 형성을 방지하기 위하여 웨이퍼를 꺼내는 동안 질소 가스를 이용한 퍼지를 실시하는 단계를 포함해서 이루어진 반도체 소자의 금속 장벽층 어닐링 방법.A method of annealing a metal barrier layer of a semiconductor device using a CVD apparatus comprising a nitrogen purge system, the method comprising: maintaining a constant temperature of a reactor at a predetermined temperature, pushing a wafer into the reactor, and nitrogen for a predetermined time; A method of annealing a metal barrier layer of a semiconductor device, comprising: annealing a gas atmosphere and purging with nitrogen gas while removing a wafer to prevent formation of a native oxide film in the metal barrier layer. 제1항에 있어서, 상기 반응로의 온도는 420℃ 내지 480℃인 것을 특징으로 하는 반도체 소자의 금속 장벽층 어닐링 방법.The method of claim 1, wherein the temperature of the reactor is 420 ℃ to 480 ℃ metal barrier layer annealing method of a semiconductor device. 제1항에 있어서, 상기 어닐링을 실시하는 시간은 20분 내지 30분인 것을 반도체 소자의 금속 장벽층 어닐링 방법.The method of claim 1, wherein the annealing time is 20 minutes to 30 minutes. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950016391A 1995-06-20 1995-06-20 Annealing method of metal barrier layer in semiconductor device KR100192167B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950016391A KR100192167B1 (en) 1995-06-20 1995-06-20 Annealing method of metal barrier layer in semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950016391A KR100192167B1 (en) 1995-06-20 1995-06-20 Annealing method of metal barrier layer in semiconductor device

Publications (2)

Publication Number Publication Date
KR970003676A true KR970003676A (en) 1997-01-28
KR100192167B1 KR100192167B1 (en) 1999-06-15

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100463266B1 (en) * 2002-09-24 2004-12-23 정봉우 Beverage Composition of Onion Comprising Gluconic Acid and Their Manufacturing Method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100463266B1 (en) * 2002-09-24 2004-12-23 정봉우 Beverage Composition of Onion Comprising Gluconic Acid and Their Manufacturing Method

Also Published As

Publication number Publication date
KR100192167B1 (en) 1999-06-15

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