KR970003249A - Flash memory device - Google Patents

Flash memory device Download PDF

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Publication number
KR970003249A
KR970003249A KR1019950018561A KR19950018561A KR970003249A KR 970003249 A KR970003249 A KR 970003249A KR 1019950018561 A KR1019950018561 A KR 1019950018561A KR 19950018561 A KR19950018561 A KR 19950018561A KR 970003249 A KR970003249 A KR 970003249A
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KR
South Korea
Prior art keywords
flash memory
memory device
word line
memory cell
inputting
Prior art date
Application number
KR1019950018561A
Other languages
Korean (ko)
Inventor
김승덕
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950018561A priority Critical patent/KR970003249A/en
Publication of KR970003249A publication Critical patent/KR970003249A/en

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

본 발명은 플래쉬 메모리 장치에 관한 것으로서, 소거모드확인시 워드라인별 소거모드확인이 가능하도록 하므로서, 소거모드확인 시간이 단축되도록 한 플래쉬 메모리 장치에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flash memory device, and to an erase mode check time for each word line during an erase mode check, thereby reducing an erase mode check time.

Description

플래쉬 메모리 장치Flash memory device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 플래쉬 메모리 장치의 회로도.2 is a circuit diagram of a flash memory device according to the present invention.

Claims (2)

플래쉬 메모리 장치에 있어서, 로우디코더를 입력으로 하는 다수의 워드라인과, 칼럼디코더를 입력으로 하는 셀렉트 트랜지스터군과, 상기 셀렉트 트랜지스터군에 접속되는 다수의 비트라인과, 상기 다수의 워드라인 및 비트라인간에 접속되는 메모리셀군과, 상기 로우디코더 및 칼럼디코더의 동작에 따라 상기 메모리셀군에서 선택되는 메모리셀의 전류와 전원으로부터 생성된 기준전류를 각각 입력으로 하는 센스앰프로 구성되는 것을 특징으로 하는 플래쉬 메모리 장치.A flash memory device comprising: a plurality of word lines for inputting a low decoder, a select transistor group for inputting a column decoder, a plurality of bit lines connected to the select transistor group, and a plurality of word lines and bit lines And a sense amplifier configured to input a current of a memory cell selected from the memory cell group and a reference current generated from a power supply according to the operation of the low decoder and the column decoder, respectively. Device. 상기 제1항에 있어서, 상기 메모리셀군은 워드라인에 다수의 셀들의 콘트롤게이트가 공통으로 접속되고, 드레인과 소오스가 직렬로 접속되며, 어느한 워드라인이 선택될때 선택된 워드라인의 셀 전류를 검출하여 센스앰프의 기준전류와 비교하여 소거모드확인이 되도록 구성되는 것을 특징으로 하는 플래쉬 메모리 장치.The memory cell group of claim 1, wherein a control gate of a plurality of cells is commonly connected to a word line, a drain and a source are connected in series, and the cell current of the selected word line is detected when one word line is selected. Flash memory device, characterized in that to confirm the erase mode compared to the reference current of the sense amplifier. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950018561A 1995-06-30 1995-06-30 Flash memory device KR970003249A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950018561A KR970003249A (en) 1995-06-30 1995-06-30 Flash memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950018561A KR970003249A (en) 1995-06-30 1995-06-30 Flash memory device

Publications (1)

Publication Number Publication Date
KR970003249A true KR970003249A (en) 1997-01-28

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ID=66526116

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950018561A KR970003249A (en) 1995-06-30 1995-06-30 Flash memory device

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KR (1) KR970003249A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000019968A (en) * 1998-09-16 2000-04-15 김영환 Erasing method in flash memory
KR100433435B1 (en) * 1997-02-27 2004-07-16 산요덴키가부시키가이샤 Semiconductor memory
KR100660535B1 (en) * 2004-12-15 2006-12-26 삼성전자주식회사 Nor flash memory device performing a serial sensing operation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100433435B1 (en) * 1997-02-27 2004-07-16 산요덴키가부시키가이샤 Semiconductor memory
KR20000019968A (en) * 1998-09-16 2000-04-15 김영환 Erasing method in flash memory
KR100660535B1 (en) * 2004-12-15 2006-12-26 삼성전자주식회사 Nor flash memory device performing a serial sensing operation

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