KR970002612A - Overflow protection device - Google Patents

Overflow protection device Download PDF

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Publication number
KR970002612A
KR970002612A KR1019950017546A KR19950017546A KR970002612A KR 970002612 A KR970002612 A KR 970002612A KR 1019950017546 A KR1019950017546 A KR 1019950017546A KR 19950017546 A KR19950017546 A KR 19950017546A KR 970002612 A KR970002612 A KR 970002612A
Authority
KR
South Korea
Prior art keywords
condition
overflow
decoder
register
write function
Prior art date
Application number
KR1019950017546A
Other languages
Korean (ko)
Other versions
KR0145893B1 (en
Inventor
이학민
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950017546A priority Critical patent/KR0145893B1/en
Publication of KR970002612A publication Critical patent/KR970002612A/en
Application granted granted Critical
Publication of KR0145893B1 publication Critical patent/KR0145893B1/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094—Condition code generation, e.g. Carry, Zero flag
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements

Abstract

이 발명은 오버플로 방지 장치에 관한 것으로서, 네거티브 플래그, 오버플로 플래그, 캐리 플래그등을 입력으로 하여 누산기에 오버플로가 발생한 조건을 검출하는 숫자의 조건 검출 회로, 상기 숫자의 조건 검출 회로의 출력으로 라이트 기능이 수행될 디코더를 인에이블 또는 디스에이블하는 레지스터 라이트 기능 선택 회로로 구성되어, 누산을 할 때 상태 레지스터의 네거티브, 오버플로, 캐리 비트를 이용하여 크거나 같은 조건, 작은 조건등을 검출하여 그 검출된 조건에 의해 레지스터 라이트 기능을 선택하여 오버플로가 발생을 하면 누산기로 지정된 레지스터를 업데이트 하지않고 오버플로가 발생하지 않으면 그 결과를 목적 레지스터에 저장하는 명령을 제공하기 위한 오버플로 방지 장치에 관한 것이다.The present invention relates to an overflow prevention device, comprising: a numerical condition detection circuit for detecting a condition in which an overflow occurs in an accumulator by inputting a negative flag, an overflow flag, a carry flag, and the like, and an output of the condition detection circuit of the number. It is composed of register write function selection circuit that enables or disables the decoder to be written. When accumulating, it detects large or equal condition and small condition by using negative, overflow and carry bit of status register. If the overflow occurs by selecting the register write function according to the detected condition, the overflow prevention device is provided to provide an instruction to store the result in the destination register if the overflow does not occur without updating the register designated by the accumulator. It is about.

Description

오버플로 방지 장치Overflow protection device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 이 발명의 실시예에 따른 오버플로 방지 장치의 구성 회로도이고, 제4도는 이 발명의 실시예에 따른 오버플로를 방지하는 명령을 수행하는 마이크로 코드의 순서도이고, 제5도는 이 발명의 실시예에 따른 오버플로가 방지된 경우의 시간과 누산기값 사이의 그래프이다.3 is a configuration circuit diagram of an overflow prevention apparatus according to an embodiment of the present invention, and FIG. 4 is a flowchart of a micro code for executing an instruction for preventing overflow according to an embodiment of the present invention, and FIG. It is a graph between the time when the overflow is prevented and the accumulator value according to the embodiment.

Claims (3)

네거티브 플래그, 오버플로 플래그, 캐리 플래그 낫캐리 플래그를 입력으로 하여 누산기에 오버플로가 발생한 조건을 검출하는 숫자의 조건 검출회로, 상기 숫자의 조건 검출 회로의 출력과 마이크로 코드에 의해 선택된 라이트모드를 이용하여 라이트 기능이 수행될 디코더를 인에이블 또는 디스에이블하는 레지스터 라이트 기능 선택 회로로 이루어지는 것을 특징으로 하는 오버플로 방지 장치.Negative flag, overflow flag, carry flag Null carry flag is used as input to detect condition where overflow occurred in accumulator, output of the number condition detection circuit and light mode selected by micro code And a register write function selection circuit for enabling or disabling the decoder on which the write function is to be performed. 제1항에 있어서, 상기한 숫자의 조건 검출 회로는, 상태 레지스터의 값으로 조건을 판별하여 부호있는 숫자의 크거나 같은 조건, 작은 조건등을 검출하는 부호있는 숫자의 조건 검출 회로, 훗자의 하한과 상한을 검출하는 숫자의 상하한 검출 회로, 상기 숫자의 상하한 검출 회로를 선택하는 기능을 하는 디코더, 상기 디코더에 의해 선택된 조건을레지스터 라이트 기능 선택 회로에 공급하는 4-입력 NAND 게이트로 이루어지는 것을 특징으로 하는 오버플로 방지 장치.2. A signed number condition detecting circuit according to claim 1, wherein said condition detecting circuit of said number is a condition of a signed number which detects a condition by a value of a status register and detects a condition equal to or less than a signed number, and a lower limit of the latter. And a four-input NAND gate for supplying the upper and lower limit detection circuits for detecting the upper and upper limits, the decoder functioning to select the upper and lower limit detection circuits for the number, and supplying a condition selected by the decoder to the register write function selection circuit. An overflow prevention device. 제1항에 있어서, 상기한 레지스터 라이트 기능 선택 회로는, 마이크로 코드로부터 라이트 모드를 선택하는디코더, 상기 디코더에 의해 인에이블 신호를 공급하는 인에이블 신호 공급 회로, 마이크로 코드에 의해 레지스터를 선택하는 디코더로 이루어지는 것을 특징으로 하는 오버플로 방지 장치.The register write function selection circuit according to claim 1, wherein the register write function selection circuit comprises: a decoder for selecting a write mode from a microcode, an enable signal supply circuit for supplying an enable signal by the decoder, and a decoder for selecting a register by a microcode. Overflow prevention device, characterized in that consisting of. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950017546A 1995-06-26 1995-06-26 The apparatus of preventing overflow KR0145893B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950017546A KR0145893B1 (en) 1995-06-26 1995-06-26 The apparatus of preventing overflow

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950017546A KR0145893B1 (en) 1995-06-26 1995-06-26 The apparatus of preventing overflow

Publications (2)

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KR970002612A true KR970002612A (en) 1997-01-28
KR0145893B1 KR0145893B1 (en) 1998-09-15

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KR1019950017546A KR0145893B1 (en) 1995-06-26 1995-06-26 The apparatus of preventing overflow

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Publication number Priority date Publication date Assignee Title
KR100929843B1 (en) * 2007-09-28 2009-12-04 주식회사 하이닉스반도체 Counters that do not overflow

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