KR970000704B1 - Manufacturing method of capacitor insulating film in semiconductor device - Google Patents

Manufacturing method of capacitor insulating film in semiconductor device Download PDF

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KR970000704B1
KR970000704B1 KR1019880004854A KR880004854A KR970000704B1 KR 970000704 B1 KR970000704 B1 KR 970000704B1 KR 1019880004854 A KR1019880004854 A KR 1019880004854A KR 880004854 A KR880004854 A KR 880004854A KR 970000704 B1 KR970000704 B1 KR 970000704B1
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semiconductor device
polysilicon
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KR890016597A (en
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오기영
김갑일
김지범
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문정환
엘지반도체 주식회사
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor

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Abstract

A fabrication method of dielectric layer of O(oxide)-N(nitride) structure in interpoly capacitor through simple process is disclosed. The method comprises the steps of: (a) forming an oxide layer(O) by RTP(rapid thermal process) being a polysilicon stack electrode maintained firstly in N2 gas atmosphere at 800deg.C for 20 seconds and then in mixing gas atmosphere of O2 and HCl at 1100deg.C; and (b) forming a nitride layer(N) by RTP being the oxide layer maintained for 10 seconds in N2 gas at 800deg.C and then maintained for 20 seconds in NH3 gas at 1100deg.C. The O-N dielectric films are directly formed on polysilicon by using RTP, thereby easily controlling the thickness of the dielectric films and decreasing the process time.

Description

반도체 소자 캐패시터 유전층 제조방법Method of manufacturing a semiconductor device capacitor dielectric layer

제1도는 본 발명의 급속열처리 공정에 의한 산화공정을 나타내는 그래프.1 is a graph showing an oxidation process by the rapid heat treatment process of the present invention.

제2도는 본 발명의 급속열처리 공정에 의한 질화공정을 나타내는 그래프.2 is a graph showing the nitriding process by the rapid heat treatment process of the present invention.

제3도는 종래의 제조방법에 다른 유전층(O-N) 구조 박막과 본 발명의 유전층(O-N) 구조 박막의 절연 파괴 특성을 나타내는 그래프.3 is a graph showing the dielectric breakdown characteristics of the dielectric layer (O-N) thin film and the dielectric layer (O-N) thin film of the present invention different from the conventional manufacturing method.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 급속열처리 공정에 의한 O-N 구조 2 : 종래의 제조방법에 따른 O-N 구조1: O-N structure by rapid heat treatment process 2: O-N structure according to conventional manufacturing method

본 발명은 양질의 산화막-질화막 구조(이하 O-N 구조라 약칭함)의 캐패시터 유전박막을 제조하는 방법에 관한 것으로 더욱 상세히 설명하면, 본 발명은 4M DRAM이 인터폴리 캐패시터(Interpoly Capacitor)필름의 제조에 적합하도록 급속열처리 공정(Rapid Thermal Process)을 이용하여 O-N 구조의 반도체 소자 캐패시터 유전박막을 제조하는 방법에 관한 것이다.The present invention relates to a method of manufacturing a capacitor dielectric thin film of a high quality oxide-nitride film structure (hereinafter, abbreviated as ON structure). More specifically, the present invention is suitable for the production of an interpoly capacitor film with 4M DRAM. The present invention relates to a method of manufacturing a semiconductor device capacitor dielectric thin film having an ON structure using a rapid thermal process.

지금까지 4M DRAM의 캐패시터 제조에 사용되고 있는 유전층(O-N) 구조 박막 제조방법은 2000Å의 두께를 갖는 다결정실리콘 캐패시터 제1전극층을 기판에 형성시킨 후, 그 위에 50 내지 60Å의 산화막을 저압화학증착(LPCVD(Low Pressure Chemical Vapor Deposition))시키고, 산화막 위에 다시 70 내지 80A의 질화막을 저압화학증착에 의해 형성시킨 후 다결정실리콘 캐패시터 제2전극층을 형성시켜 왔다.The method of manufacturing a dielectric layer (ON) thin film, which has been used to manufacture capacitors of 4M DRAM, is to form a polysilicon capacitor first electrode layer having a thickness of 2000 GPa on a substrate, and then a low pressure chemical vapor deposition (LPCVD) of 50 to 60 GPa is formed thereon. (Low Pressure Chemical Vapor Deposition), and a 70-80A nitride film was formed again on the oxide film by low pressure chemical vapor deposition, and then a polysilicon capacitor second electrode layer was formed.

이를 간단히 도표로 나타내면 다음과 같다.A simple diagram of this is as follows.

Figure kpo00001
Figure kpo00001

(O-N 구조의 캐패시터 유전박막)(O-N Capacitor Dielectric Thin Film)

상기한 O-N 구조 캐패시터 유전박막을 제조하는 방법은, 다결정실리콘, 캐패시터 제1전극층상에 100Å이하의 얇은 산화막 및 질화막을 형성시키는데 있어서 통상의 노(Furnace) 공정으로는 불가능하므로 저압 화학중착을 이용하여 수행하고 있다.The method of manufacturing the ON structure capacitor dielectric thin film described above uses low pressure chemical deposition because it is impossible to use a conventional furnace process in forming a thin oxide film and a nitride film of 100 Å or less on the polycrystalline silicon and the capacitor first electrode layer. Is being performed.

그러나 이는 공정의 번거로움 뿐만 아니라, 다결정실리콘상에서의 산화속도가 빠르고 산화막의 질이 저하되기 때문에 100Å 이하의 박막의 두께를 조절하는데 많은 어려움이 수반되고, 또한 박막의 전기적 특성을 저하시키는 미세입자(Particle)가 발생되는 문제점이 있다.However, this is not only a cumbersome process, but also due to the rapid oxidation rate on the polysilicon and the deterioration of the quality of the oxide film, it is difficult to control the thickness of the thin film of 100 μs or less, and also to reduce the electrical properties of the thin film ( Particles) occur.

따라서, 본 발명의 목적은 상기한 문제점을 해결하고, 더욱 우수한 전기적 특성을 갖는 O-N 구조 캐패시터 유전박막의 제조방법을 제공하는데 있다.Accordingly, an object of the present invention is to solve the above problems and to provide a method for producing an O-N structure capacitor dielectric thin film having more excellent electrical characteristics.

본 발명은 상기한 O-N 구조의 캐패시터 유전박막 제조공정의 문제점을 해결하기 위하여 박막의 증착시 종래의 저압화학증착방법 대신에 900-1300℃에서의 급속열처리 공정을 도입하여 사용하므로서 다결정실리콘 캐패시터 제1전극에서의 직접산화에 의해 100Å 이하의 얇은 산화막을 용이하게 형성시키고, 또한 질화막도 다결정실리콘층상에 형성된 산화막을 직접 질화시켜 박막형성의 전공정을 단순화시킴과 동시에 산화막과 질화막 사이의 계면특성을 더욱 향상시켰다.The present invention provides a polysilicon capacitor first by introducing a rapid heat treatment process at 900-1300 ° C. instead of the conventional low pressure chemical vapor deposition method in order to solve the above problems of the capacitor dielectric thin film manufacturing process of the ON structure. Direct oxidation at the electrode facilitates the formation of a thin oxide film of 100 Å or less, and the nitride film also directly nitrides the oxide film formed on the polysilicon layer, simplifying the entire process of thin film formation and at the same time improving the interface characteristics between the oxide film and the nitride film. Improved.

본 발명에 있어서 질화막은 산화막의 일부 또는 전부를 질화시켜 각종 분야에 활용할 수 있으며, 본 발명의 급속 열처리공정에 사용되는 반응로는 본 공정의 조건을 만족시킬 수 있다.In the present invention, the nitride film may be utilized in various fields by nitriding part or all of the oxide film, and the reaction furnace used in the rapid heat treatment step of the present invention may satisfy the conditions of the present step.

이하, 본 발명을 도면을 참조하여 더욱 구체적으로 나타낸다.Hereinafter, the present invention will be described in more detail with reference to the drawings.

제1도 및 제2도는 본 발명에 따른 캐패시터 유전박막 제조공정의 열처리 과정을 나타낸 것이다.1 and 2 show the heat treatment process of the capacitor dielectric thin film manufacturing process according to the present invention.

제1도는 급속열처리 공정으로서 다결정실리콘 캐패시터 전극상에 산화막을 형성시키기 위해 N25.0ℓ/m3의 분위기하에서 다결정실리콘을 약 20초 동안 800℃로 급속히 상승시키고, 약 10초 동안 유지시킨 후 다시 021.5ℓ/㎥ 및 HCI 0.04ℓ/㎥의 혼합가스 분위기하에서 약 1100℃까지 상승시키고 다결정실리콘층을 산화시켜 산화층을 형성한다.FIG. 1 is a rapid heat treatment process in which a polysilicon is rapidly raised to 800 ° C. for about 20 seconds in an atmosphere of N 2 5.0 L / m 3 to form an oxide film on a polysilicon capacitor electrode, held for about 10 seconds, and then again to 0. 2 In a mixed gas atmosphere of 1.5 L / m 3 and HCI 0.04 L / m 3, the temperature is raised to about 1100 ° C. and the polysilicon layer is oxidized to form an oxide layer.

이때 산화막의 두께는 1100℃에서의 열처리시간을 조절함에 의해 결정되며, 통상 10 내지 15초로 유지하며, 대체로 100Å 이하로 형성시킨다. 산화막의 두께를 조절하기 위한 적합한 시간을 경과시킨 후, N2가스 5.0ℓ/㎥ 분위기하에서 약 800℃로 온도를 낮추고 다시 약 1050℃로 약간 상승시켜 약 20초 이상 유지시키면서 아닐링(annealing)을 행하여 산화막의 질을 향상시킨다.At this time, the thickness of the oxide film is determined by adjusting the heat treatment time at 1100 ° C., usually maintained at 10 to 15 seconds, and generally formed to be less than 100Å. After a suitable time for controlling the thickness of the oxide film, the temperature is lowered to about 800 ° C. under N 2 gas of 5.0 L / m 3 , and slightly raised to about 1050 ° C. to maintain annealing for at least 20 seconds. To improve the quality of the oxide film.

제2도는 본 발명의 급속열처리 공정으로서, 상기한 산화막상에 질화막을 형성시키기 위해 제1도와 행하여 질화막을 형성시킨다.FIG. 2 is a rapid heat treatment process of the present invention, in which a nitride film is formed as shown in FIG. 1 to form a nitride film on the oxide film.

즉, 상기한 산화막상에 N25.0ℓ/㎥의 가스 분위기하에서 약 20초 동안 800A.로 급속열처리하여 약 10초 동안 유지시킨 후, NH31.0ℓ/㎥ 분위기하에서 다시 급속열처리하여 1100℃까지 상승시키고 약 20초 동안 유지시켜 상기한 산화막상에 다시 질화에 의한 질화막을 약 100Å 이하로 형성시킨다. 질화막의 두께는 상기한 산화막과 유사하게 1100℃에서의 질화시간의 조절에 결정할 수 있다.That is, on the oxide film, rapid heat treatment was performed at 800 A. for about 20 seconds in a gas atmosphere of N 2 5.0 L / m 3 , and maintained for about 10 seconds, followed by rapid heat treatment again in NH 3 1.0 L / m 3 atmosphere to 1100 ° C. It was raised and held for about 20 seconds to form a nitride film by nitriding again on the oxide film below about 100 kPa. The thickness of the nitride film can be determined to control the nitride time at 1100 ° C. similarly to the oxide film described above.

질화막을 형성시킨 후 N2가스 5.0ℓ/㎥ 분위기하에서 800℃로 온도를 낮춘 후 다시 1050℃로 상승시켜 약 30초 동안 아닐링을 실시하여 질화막의 질을 향상시킨다.After the nitride film was formed, the temperature was lowered to 800 ° C. under N 2 gas of 5.0 L / m 3, and then raised to 1050 ° C. to perform annealing for about 30 seconds to improve the quality of the nitride film.

특히 본 발명에 따른 질화공정은 산화막과 질화막 사이의 계면특성을 향상시키고, 반도체 배선의 전기전 특성에 중요한 절연파괴 특성을 더욱 향상시킨다.In particular, the nitriding process according to the present invention improves the interfacial properties between the oxide film and the nitride film, and further improves the dielectric breakdown property, which is important for the electrical properties of the semiconductor wiring.

본 발명의 의한 O-N 구조의 캐패시터 박막은 상기한 바와 같이 제조공정이 간단할 뿐만 아니라 우수한 전기적 특성을 가진다.The capacitor thin film of the O-N structure according to the present invention has not only a simple manufacturing process but also excellent electrical characteristics as described above.

즉, 제3도는 종래의 방법에 따라 제조된 O-N 구조 박막과 본 발명에 따른 O-N 구조 박막의 절연파괴(Break Down) 특성을 그래프로 나타낸 것이다.That is, FIG. 3 is a graph showing breakdown characteristics of the O-N structure thin film manufactured according to the conventional method and the O-N structure thin film according to the present invention.

즉, 낮은 인가전압 영역에서의 누설전류(Leakahe Current)는 종래의 방법에 따른 O-N 구조 박막과 본 발명의 급속열처리 공정에 따른 O-N 구조 박막에는 큰 차이가 나타나지 않으나, 절연파괴가 일어나는 순간의 전류의 도전율(dI/dV)은 본 발명에 따라 제조된 O-N 구조 박막이 더욱 크다는 것을 알 수 있다.That is, the leakage current (Leakahe Current) in the low applied voltage region does not show a significant difference between the ON structure thin film according to the conventional method and the ON structure thin film according to the rapid heat treatment process of the present invention, but the current of the instant when the breakdown occurs It can be seen that the conductivity (dI / dV) is larger in the ON structure thin film manufactured according to the present invention.

이상과 같이 본 발명에 따른 급속열처리 공정에 의해 제조된 O-N 구조 박막은 폴리상에서 얇은 산화막 및 질화막을 직접 형성시킬 수 있으며 두께 조절이 용이하고 종래의 공정에 비해 급속열처리 공정의 장비만을 사용하므로 공정을 단순화시키고 공정시간을 단축시켜 경제적 효과를 증대시키면서, 또한 종래의 공정에 따라 제조된 O-N 구조보다 더욱 우수한 전기적 특성을 얻을 수 있는 효과가 있다.As described above, the ON structure thin film manufactured by the rapid heat treatment process according to the present invention can directly form a thin oxide film and a nitride film on a poly phase, and can easily control the thickness and use only the equipment of the rapid heat treatment process as compared to the conventional process. While increasing the economic effect by simplifying and shortening the process time, there is also an effect that can obtain better electrical properties than the ON structure manufactured according to the conventional process.

Claims (3)

다결정실리콘의 캐패시터 저장전극을 N2분위기에서 20초 동안 800℃로 상승시키고 10초 동안 유지시킨 후 O2와 HCI의 혼합가스 분위기에서 1100℃로 상승시켜 상기 다결정실리콘의 캐패시터 전극을 산화시켜 산화층을 형성하는 공정과, 상기 산화층상에 N2분위기에서 20초 동안 800℃로 상승시키고 10초 동안 유지 시킨 후 NH3분위기에서 1100℃로 상승시키고 20초 동안 유지하여 질화층을 형성하는 공정을 포함하여 이루어지는 반도체 소자 캐패시터 유전층 제조방법.The capacitor storage electrode of polysilicon was raised to 800 ° C. for 20 seconds in an N 2 atmosphere and maintained for 10 seconds, and then raised to 1100 ° C. in a mixed gas atmosphere of O 2 and HCI to oxidize the capacitor electrode of the polysilicon. And forming a nitride layer on the oxide layer by increasing to 800 ° C. for 20 seconds in an N 2 atmosphere and maintaining it for 10 seconds, then increasing to 1100 ° C. in a NH 3 atmosphere and holding for 20 seconds. A method of manufacturing a semiconductor device capacitor dielectric layer. 제1항에 있어서, 산화층 및 질화층 100Å 이하의 두께로 형성함을 특징으로 하는 반도체 소자 캐패시터 유전층 제조방법.The method of manufacturing a semiconductor device capacitor dielectric layer according to claim 1, wherein the oxide layer and the nitride layer are formed to a thickness of 100 GPa or less. 제1항에 있어서, 질화층 형성 후 N2가스 5.0ℓ/㎥ 분위기에서 800℃로 온도를 낮춘 뒤 1050℃로 상승시켜 20초 이상 아닐링을 실시하는 공정을 더 포함함을 특징으로 하는 반도체 소자 캐패시터 유전층 제조방법.The semiconductor device according to claim 1, further comprising a step of performing annealing for 20 seconds or more by lowering the temperature to 800 ° C. in a N 2 gas 5.0 L / m 3 atmosphere after forming the nitride layer. A method of manufacturing a capacitor dielectric layer.
KR1019880004854A 1988-04-28 1988-04-28 Manufacturing method of capacitor insulating film in semiconductor device KR970000704B1 (en)

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