KR100650758B1 - Method for forming gate of semiconductor device - Google Patents

Abstract

A method for forming a gate of a semiconductor device is provided to reduce the effective thickness of a gate oxide layer by using a TaHfO dielectric film with high permittivity as the gate oxide layer. A semiconductor substrate(1) having an isolation layer(2) is prepared. A silicon-based oxide layer(3) is formed on the substrate. A TaHfO layer(4) as a gate oxide layer is formed on the silicon-based oxide layer. The resultant structure is treated by N2O plasma and annealed under a high temperature. A barrier metal film(5) and a gate metal film(6) are sequentially formed on the resultant structure. By patterning the gate metal film, the barrier metal film, the TaHfO layer and the silicon-based oxide layer, a gate(8) is then formed.

Description

METHOOD FOR FORMING GATE OF SEMICONDUCTOR DEVICE

1A to 1D are cross-sectional views illustrating processes for forming a gate of a semiconductor device in accordance with an embodiment of the present invention.

2 is a view for explaining a TaHfO film deposition process according to the present invention.

Explanation of symbols on the main parts of the drawings

1 semiconductor substrate 2 device isolation film

3: silicon oxide film 4: TaHfO film

5: Barrier Metal Film 6: Gate Metal Film

7: mask pattern 8: gate

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming a gate of a semiconductor device.

As the degree of integration of semiconductor devices is rapidly increasing, polysilicon films or polyside films, which are mainly used as gate conductive films of MOSFET devices, have limitations in implementing low resistance values required for fine line widths. There is a need for development of gates of new materials and structures, and thus, research and development on metal gates is actively underway.

On the other hand, not only the gate conductive films but also the gate insulating films are required to improve their constituent materials as high integration proceeds. In general, a silicon oxide film (SiO 2) by thermal oxidation has been used as a gate insulating film material of a MOSFET. However, as the degree of integration of semiconductor devices is increased, the thickness of the gate insulating film is required to be reduced. When the silicon oxide film is used as a material of the gate insulating film, if the thickness of the gate insulating film becomes too thin, direct tunneling through the gate insulating film is performed. Since leakage current due to direct tunneling becomes large, the device characteristics become unstable as a result.

However, when the high dielectric material having a higher dielectric constant than the silicon oxide film SiO2 is used as the gate insulating film material, the effective thickness can be significantly lowered compared with the case where the silicon oxide film SiO2 is used. Therefore, studies are actively underway to use a high dielectric material that can be applied to a highly integrated device as a gate insulating material. As an example, a high dielectric material such as an HfO 2 (ε = 20) or Ta2O5 (ε = 25) film is used. There is research into the material.

The HfO2 or Ta2O5 film can easily reduce the effective thickness of the gate oxide film in relation to having a dielectric constant of about 5 to 6 times higher than that of SiO2, and thus can be advantageously applied to the fabrication of highly integrated devices.

However, the HfO 2 film has a poor thermal stability due to its material property, and the Ta 2 O 5 film has a high leakage current characteristic. Therefore, in order to apply the HfO 2 or Ta 2 O 5 films as the gate insulating film material, a heat treatment for improving leakage current characteristics and film quality must be performed after the deposition. However, as the subsequent heat treatment proceeds, SiO _x, Hf _1-X Si _X O ₂ films _, such as low dielectric constant materials, are formed at the interface between the gate insulating film and the silicon substrate, so that an effective thickness reduction effect is not substantially obtained. .

In addition, when the Ta2O5 film is applied to the metal gate electrode as a gate insulating film, the work voltage of the gate electrode is large, so that the threshold voltage of the NMOS region is 1V or more, and B (boron) is used to lower the high threshold voltage. Instead, P (phosphorus) had to be ion implanted. However, in this case, since a buried channel is formed in the NMOS region, various problems occur.

As a result, in applying the HfO2 or Ta2O5 film as a gate oxide material, the prior art cannot satisfy all of effective thickness, leakage current characteristics, thermal stability, and ease of threshold voltage control.

Accordingly, the present invention has been made to solve the above problems, and can satisfy all of the effective thickness, leakage current characteristics, thermal stability, and ease of threshold voltage control when the high dielectric material is applied to the gate oxide material. The purpose is to provide a gate forming method.

The gate forming method of the present invention for achieving the above object comprises the steps of providing a semiconductor substrate provided with a device isolation film; Forming a silicon oxide film on the substrate; Forming a TaHfO film as a gate insulating film on the silicon oxide film; N 2 O plasma treatment of the substrate output; High temperature heat treatment of the substrate product; Sequentially forming a barrier metal film and a gate metal film on the substrate resultant; And sequentially etching the gate metal film, the barrier metal film, the TaHfO film, and the silicon oxide film.

Here, the silicon oxide film is formed of a silicon oxide film (SiO 2) or a silicon nitride oxide film (SiON), but is formed to a thickness of 15 Pa or less at a temperature of 700 to 1100 ° C. using a rapid thermal process (RTP) method.

The TaHfO film is formed to a thickness of 20 to 500 Pa at a temperature of 300 to 500 ° C. according to the ALD method.

Here, the deposition of the TaHfO film using the ALD method, Ta _X O _Y thin film deposition cycle (recovery: n) and Hf source gas flow step, purge step of Ta source gas flow step, purge step, reaction gas flow step and purge step , Hf _X O _Y thin film deposition cycle (recovery: m) of the reaction gas flow step and the purge step is carried out in such a manner that n: m is less than 9: 1, or Ta source gas flow step, purge step The TaHfO thin film deposition cycles of the Hf source gas flow step, the purge step, the reactant gas flow step, and the purge step are the Ta source gas flow and the purge recovery (n ') and the Hf source gas flow and the purge recovery (m'). The control is repeated so that m 'is less than or equal to 9: 1.

In this case, the TaHfO film is deposited using Ta (OC2H5) 5 as the source gas of Ta or any one selected from the group consisting of other organometallic compounds (Ta [N (CH3) 2] 5, etc.) containing Ta. As the reaction gas, any one selected from the group consisting of O 3 (concentration: 200 ± 20 g / m 3), plasma O 2 and H 2 O vapor is used. Here, the source gas flows 50 to 500 sccm, and the reaction gas flows 0.1 to 1 slm.

In addition, the TaHfO film is deposited using C16H36HfO4 as the source gas of Hf, or any one selected from the group consisting of other organometallic compounds (TDEAHf, TEMAHf, etc.) containing Hf, and reacting with O3 (concentration: 200). ± 20 g / m3), one selected from the group consisting of plasma O2 and H2O vapors. Here, the source gas flows 50 to 500 sccm, and the reaction gas flows 0.1 to 1 slm.

The N2O plasma treatment of the TaHfO film is a low temperature annealing process for removing organic matter and nitrogen in the TaHfO film and supplying oxygen to an oxygen deficient region, using a plasma having an RF power of 100 to 500 W, in a temperature range of 200 to 500 ° C. And in a pressure range of 0.1 to 10 torr, for 1 to 5 minutes in an N 2 O gas atmosphere.

The high temperature heat treatment of the TaHfO film is a heat treatment step for inducing crystallization of the amorphous TaHfO film and ultimately improving the dielectric property of the TaHfO film. do.

Here, the high temperature heat treatment may be performed while flowing the selected gas at a temperature of 600 to 800 ° C. by 5 sccm to 5 slm using an electric furnace, or at atmospheric pressure (700 to 760 torr) or reduced pressure (1 to 1 ° C.) at a temperature of 500 to 800 ° C. using RTP. 100 torr) in the chamber while flowing the selected gas by 5 sccm to 5 slm.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The present invention constitutes a metal gate employing a TaHfO ternary high dielectric film as the gate oxide material.

In this case, in relation to the TaHfO (ε = 30-50) film, which is a material having a higher dielectric constant, less leakage current, and superior thermal stability than the conventional HfO2 (ε = 20) film or Ta2O5 (ε = 25) film, the gate The oxide film can be formed to a thin thickness which is easy to apply to the next generation high integration device, and stable leakage current characteristics can be obtained.

In particular, the TaHfO film in relation to the superior thermal stability materials, metal-gate formation process selective oxidation (Selective oxidation) when the effective oxide due to the low dielectric oxide film generated on the interface between the gate insulating film and the silicon substrate (T _eff) increased thickness in The phenomenon can be suppressed. In addition, resistance to subsequent heat treatment in an oxidizing atmosphere is increased.

In addition, when a conventional Ta2O5 film is used as an insulating film of a metal gate, the threshold voltage of the NMOS region is greater than 1V because the work function of the gate electrode is large, and P is lowered instead of B (boron) to lower the high threshold voltage. (Phosphorus) had to be ion implanted. However, in this case, since a buried channel is formed in the NMOS region, various problems occur. However, in the case of the TaHfO film of the present invention, the threshold voltage can be easily adjusted as compared with the Ta2O5 film, thus improving the reliability of the device.

As a result, the metal gate employing the TaHfO film is applied to the metal gate employing the conventional HfO2 (ε = 20) film or Ta2O5 (ε = 25) film in all aspects of effective thickness, leakage current characteristics, thermal stability, and ease of threshold voltage adjustment. Compared to other products, it can be easily applied to next generation DRAM products.

1A to 1D are cross-sectional views illustrating processes for forming a gate of a semiconductor device according to the present invention.

First, as shown in FIG. 1A, device isolation layers 2 defining an active region are formed on a surface of a semiconductor substrate 1 by a known shallow trench isolation (STI) process, and then the semiconductor substrate 1 is formed. In order to improve the interfacial properties of the N-O2 or N2O gas atmosphere and 700 to 1100, a silicon oxide film 3 such as a silicon oxide film (SiO 2) or a silicon nitride oxide film (SiON) is formed on the substrate 1 in a rapid thermal process (RTP) manner. It is formed to a thickness of 15 Pa or less in the temperature range. Here, in particular, the silicon oxynitride film serves to suppress oxidation of the semiconductor substrate 1 during heat treatment in a subsequent O 2 atmosphere.

Then, a TaHfO film 4 is formed on the silicon oxide film 3 as a gate insulating film at a thickness of 20 to 500 kPa, preferably 20 to 100 kPa, at a temperature of 300 to 500 DEG C according to the ALD method. .

2 is a view for explaining the TaHfO film 4 deposition process according to the ALD process, the deposition of the TaHfO film 4, as shown, Ta source gas flow step, purge step, reaction gas flow step and a: (m number of) n:: the purge step Ta _X O _Y film deposition cycles (number n) and Hf source gas flow step, a purge step, the reaction gas flow step and the purge step of Hf _X O _Y film deposition cycle m is The TaHfO thin film deposition cycle of the Ta source gas flow step, the purge step, the Hf source gas flow step, the purge step, the reaction gas flow step, and the purge step is carried out in such a manner as to repeat the process so that it becomes 9: 1 or less. The flow and purge recovery (n ') and the Hf source gas flow and purge recovery (m') are repeated in such a manner that n ': m' is controlled to be 9: 1 or less.

At this time, the deposition of the TaHfO film 4 is selected from the group consisting of Ta (OC2H5) 5 or Ta-containing other organometallic compounds (Ta [N (CH3) 2] 5, etc.) as the source gas of Ta. Either one is used and one selected from the group consisting of O 3, plasma O 2 and H 2 O vapor is used as the reaction gas. At this time, the source gas of Ta flows 50-500 sccm, and the reaction gas flows 0.1-1 slm. In particular, when the reaction gas is O 3, the concentration is 200 ± 20 g / m 3.

In addition, the deposition of the TaHfO film 4 uses C16H36HfO4 as the source gas of Hf or any one selected from the group consisting of other organometallic compounds (TDEAHf, TEMAHf, etc.) containing Hf, and O3 as the reaction gas. , Any one selected from the group consisting of plasma O2 and H2O vapor is used. At this time, the source gas of Hf flows 50-500 sccm, and the reaction gas flows 0.1-1 slm. In particular, when the reaction gas is O 3, the concentration is 200 ± 20 g / m 3.

Referring to FIG. 1B, after forming the TaHfO film 4 according to the ALD method, performing low temperature annealing with an N 2 O plasma to remove organic matter and nitrogen in the TaHfO film 4 and supply oxygen to an oxygen depletion region. do. Here, the low temperature annealing using the N 2 O plasma is performed for 1 to 5 minutes in an N 2 O gas atmosphere at a temperature range of 200 to 500 ° C. and a pressure range of 0.1 to 10 torr using a plasma having an RF power of 100 to 500 W.

Then, N2 or O2 / N2 (O2 / N2 = 0.1 or less) atmosphere by an electric furnace thermal process or RTP method, inducing crystallization of the TaHfO film 4 and ultimately improving the dielectric property of the TaHfO film 4. The high temperature heat treatment is performed at 500 to 900 ° C. At this time, the high temperature heat treatment using the electric furnace is performed while flowing the selected gas at a temperature of 600 to 800 ° C. by 5 sccm to 5 slm, and the high temperature heat treatment using RTP is performed at a normal pressure (700 to 760 torr) or a reduced pressure (1 to 500 to 800 ° C.). The selected gas is flowed in a chamber by 5 sccm to 5 slm.

Then, as shown in FIG. 1C, a barrier metal film 5 such as TiN or WN is formed on the TaHfO film 4. Then, any one metal film 6 selected from the group consisting of WSix, TiSix and W is formed as the gate metal film 6 on the barrier metal film 5. Then, a mask pattern 7 for forming a gate pattern is formed on the gate metal film 6.

Referring to FIG. 1D, the gate metal film 6, the barrier metal film 7, the TaHfO film 4, and the silicon oxide film 3 are sequentially etched using the mask pattern 7 as an etch barrier. The gate 8 is formed.

Thereafter, although not shown, the semiconductor device of the present invention is completed by performing a known subsequent process.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

As described above, according to the present invention, by forming a metal gate using a TaHfO (ε = 30-50) ternary high dielectric film having a high dielectric constant as the gate oxide material, the effective thickness of the gate oxide film can be lowered as well as leakage current. As the generation suppression ability can be improved, the metal gate having the stable leakage current characteristic with the thin thickness required in the highly integrated memory product can be realized.

In addition, since the TaHfO film has a higher resistance to subsequent thermal processes and oxidation atmospheres than a conventional HfO 2 (ε = 20) film or Ta2O5 (ε = 25) film, the TaHfO film is used in a selective oxidation process used in a metal gate application. Since the effect of increasing the effective oxide film thickness (T _eff ) is suppressed and the resistance to deterioration of reliability is increased in the H2 rich oxidation atmosphere, the durability and reliability of the device can be obtained.

In addition, in the present invention, the metal gate in which the TaHfO film is applied as the gate oxide film is easier to adjust the threshold voltage than the gate in which the Ta2O5 film is conventionally applied.

As a result, the metal gate employing the TaHfO film in the present invention employs a conventional HfO2 (ε = 20) film or Ta2O5 (ε = 25) film in all aspects of effective thickness, leakage current characteristics, thermal stability, and ease of threshold voltage adjustment. It is superior to metal gates and can be easily applied to next generation DRAM products.

Claims (12)

Providing a semiconductor substrate provided with an isolation layer; Forming a silicon oxide film on the substrate; Forming a TaHfO film as a gate insulating film on the silicon oxide film; N 2 O plasma treatment of the substrate output; High temperature heat treatment of the substrate product; Sequentially forming a barrier metal film and a gate metal film on the substrate resultant; And And sequentially etching the gate metal film, the barrier metal film, the TaHfO film, and the silicon oxide film. The method of claim 1, wherein the silicon oxide film is formed of a silicon oxide film (SiO 2) or a silicon nitride oxide film (SiON). The method of claim 1, wherein the silicon oxide film is formed to a thickness of 15 kPa or less at a temperature of 700 to 1100 ° C. using a rapid thermal process (RTP) method. The method of forming a gate of a semiconductor device according to claim 1, wherein the TaHfO film is formed at a thickness of 20 to 500 kPa at a temperature of 300 to 500 DEG C according to the ALD method. 5. The TaHfO film deposition method according to claim 4, wherein the TaHfO film is deposited using a Ta source gas flow step, a purge step, a reaction gas flow step, and a purge step of Ta _X O _Y thin film deposition cycle (recovery: n) and Hf source gas flow. The Hf _X O _Y thin film deposition cycle (recovery: m) of the steps, purge step, reaction gas flow step and purge step is repeated in such a manner that n: m is 9: 1 or less. Gate forming method. The TaHfO thin film deposition cycle of Ta source gas flow step, purge step, Hf source gas flow step, purge step, reaction gas flow step and purge step is performed by Ta source gas deposition. The flow and purge recovery (n ') and Hf source gas flow and purge recovery (m') is carried out in such a manner that it is repeatedly performed while controlling so that n ': m' is less than 9: 1 ratio Gate forming method. 5. The method of claim 4, wherein the deposition of the TaHfO film is selected from the group consisting of Ta (OC2H5) 5 or Ta-containing other organometallic compounds (Ta [N (CH3) 2] 5, etc.) as the source gas of Ta. And using any one selected from the group consisting of O 3 (concentration: 200 ± 20 g / m 3), plasma O 2, and H 2 O vapor as the reaction gas. The method of claim 4, wherein the TaHfO film is deposited using C16H36HfO4 as the source gas of Hf, or any one selected from the group consisting of other organometallic compounds (TDEAHf, TEMAHf, etc.) containing Hf. (Concentration: 200 ± 20 g / m3), the gate forming method of a semiconductor device, characterized in that any one selected from the group consisting of plasma O2 and H2O vapor is used. The method according to claim 7 or 8, The source gas flows 50 to 500 sccm, and the reaction gas flows 0.1 to 1 slm. The N2O plasma treatment of the TaHfO film is a low temperature annealing process, using a plasma having an RF power of 100 to 500 W in an N 2 O gas atmosphere at a temperature range of 200 to 500 ° C. and a pressure range of 0.1 to 10 torr. The gate forming method of a semiconductor device, characterized in that for 1 to 5 minutes. The method of claim 1, wherein the high temperature heat treatment of the TaHfO film is a heat treatment step for inducing crystallization of the amorphous TaHfO film and ultimately improving the dielectric property of the TaHfO film, wherein the TaHfO film is 500 to 500 in an N2 or O2 / N2 (O2 / N2 = 0.1 or less) atmosphere. A method of forming a gate of a semiconductor device, characterized in that it proceeds to a temperature of 900 ℃. 12. The method of claim 11, wherein the high temperature heat treatment is performed by flowing the selected gas at a temperature of 600 to 800 ° C. by 5 sccm to 5 slm using an electric furnace, or at atmospheric pressure (700 to 760 torr) at a temperature of 500 to 800 ° C. using RTP. Or in the reduced pressure (1-100 torr) chamber while flowing the selected gas by 5 sccm to 5 slm.

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