KR970000471B1 - A new thin film transistor structure for increasing storage capacitance in the pixel element - Google Patents

Abstract

There is provided a liquid crystal display in which a picture is constructed of pixel devices each of which includes a source node serving as a predetermined liquid crystal node. The pixel device includes a voltage line connected to a predetermined voltage supply, a first switching transistor, connected to the voltage line, for forming a current path between a predetermined data line and the liquid crystal node, and second switching transistor, connected to the voltage line, for forming a current path between the data line and liquid crystal node. Accordingly, the pixel device whose current driving performance and capacitance increase is provided to speed up the charging time of current at the source node.

Description

Structure of Pixel Element of Liquid Crystal Display Device and Manufacturing Method Thereof

1 is a circuit diagram showing the structure of a pixel device common in this field.

FIG. 2 is a diagram of FIGS. 2A and 2B. FIG. 2A is a voltage waveform diagram of a data line, a gate terminal and a common electrode node of the pixel device of FIG. 1, and FIG. 2B is a voltage waveform of the source node of FIG. Drawing showing each level.

3 shows an equivalent circuit of a pixel device according to the present invention.

FIG. 4 is a diagram illustrating FIGS. 4A to 4D, and FIGS. 4A to 4D are process diagrams illustrating a method of manufacturing a switching transistor according to the present invention.

5 is a 5a to 5d is a view, 5a to 5d is a process chart showing a manufacturing method of a storage capacitor according to the present invention.

6 is a voltage waveform diagram showing the front-wheel drive capability of the switching transistor in the pixel device according to the present invention as compared with the prior art.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to liquid crystal displays, and more particularly, to a structure of a pixel element of a liquid crystal display and a manufacturing method thereof.

In recent years, electronic display systems have been widely distributed not only in the industry but also in individual homes, and have been diversified and expanded in accordance with their purpose. Among them, the liquid crystal display is extremely lightweight, thin, inexpensive, and low power consumption, so that it can be matched with integrated circuits.It can be used for loading a vehicle or displaying color television in addition to the display of a laptop or pocket computer. Its use is expanding rapidly. This trend is derived from the fact that liquid crystal displays (hereinafter referred to as LCDs) are screen display devices using liquid crystals, which satisfy the demand for thinner and smaller sizes than conventional CRTs as products that apply optical anisotropy of liquid crystals. LCDs, on the other hand, typically contain liquid crystals in the gap between two panes and apply voltage through a transparent electrode to change the molecular arrangement of the crystals. Elements consisting of a glass plate and electrodes are arranged in a dot matrix or seven-segment form, and letters or numbers are displayed on each electrode with or without voltage. It is slow in response but consumes less power and can be made into a thin plate, so it is widely used for watches, electronic calculators, screens of portable computers, and control panels of various machines. Usually, the liquid crystal does not emit light by itself, and when the light is reflected by the rear reflection plate, the portion where the voltage is applied is distinguished from the contrast because the liquid crystal becomes opaque and is not reflected. Therefore, the screen may not be clear depending on the viewing direction and may not be used in a dark place without light. In order to compensate for this, there is a backlight method in which a light emitting device is mounted on the back instead of a reflector, and most LCDs adopt this method. On the other hand, LCD drive system is composed of simple matrix type and active matrix type. The active matrix method is mainly driven by an active matrix method because of excellent display characteristics such as full-color, wide viewing range, and high contrast compared to the simple matrix method. In this regard, Patent No. 4,917,467, registered in the United States of America on April 17, 1990, discloses an address array based on such an active matrix method. In the active matrix method, a thin film transistor (hereinafter referred to as TFT) is used as a pixel switching element in an LCD, in particular, in order to enable the driving circuit to be integrated on the same substrate. As follows.

1 is an equivalent circuit diagram showing the configuration of a pixel element having a conventional TFT in this technical field. The configuration of the pixel device shown in FIG. 1 shows the configuration of a unit pixel device, and the configuration of FIG. 1 is composed of a plurality of screen elements in a row and a column direction, respectively, to display one screen. Will be configured. In the configuration of Fig. 1, reference numeral 2 denotes a switching transistor composed of TFTs. In addition, reference numeral 4 denotes a storage capacitor, which is realized by a normal MOS process in a manufacturing process, and this storage capacitor is also referred to as a storage capacitor transistor. Reference numeral 6 denotes a parasitic capacitor between the gate of the switching transistor 2 and the source terminal. In addition, reference numeral 8 denotes a node to which a voltage is applied to the liquid crystal (commonly referred to as a liquid crystal node in this field), which will be described as a source node in the following specification. On the other hand, the role of the storage capacitor 4 is to suppress the effects of voltage fluctuations caused by parasitic capacitance.

FIG. 2A is a voltage waveform diagram applied to the data line of the pixel device of FIG. 1 and Vcom applied to the V (i) and the common electrode node 10. FIG. 2B shows the voltage actually applied to the source node 8 of FIG. have.

Referring to FIGS. 2A and 2B, a driving method and an operation characteristic thereof of the pixel device illustrated in FIG. 1 will be described as follows. First, in the case of the time interval to≤t≤t1 in FIG. 2a is as follows. After the gate voltage V (i) of the switching transistor 2 becomes a logic high, the switching transistor 2 is turned on. Thus, the source node 8 of the switching transistor 2 is charged with the voltage on the data line. The waveform of the voltage charged to the source node 8 is shown in FIG. 2B. On the other hand, when t1 ≤ t ≤ t2 in the time interval of FIG. 2a is as follows. After the gate voltage V (i) of the switching transistor 2 becomes a logic low, the switching transistor 2 is turned off. Thus, the source node 8 of the switching transistor 2 maintains the voltage state charged in the previous section. The liquid crystal connected to the source node 8 is operated. On the other hand, the source node 8 rises above the voltage applied from the data line by coupling by the parasitic capacitor 6 in the to≤t≤t1 section of FIG. 2A. As shown in FIG. 2b, a direct current (DC) voltage is present. This DC voltage causes flicker noise or sticking effect due to the flickering operation of the display, which acts as a factor of degrading image quality. Therefore, in order to reduce this DC voltage, ΔV in FIG. 2B should be reduced.

At this time, as Cgs / Cs decreases, ΔV decreases, so the storage capacitor 4 must be increased to increase Cs. However, since the portion occupied by the storage capacitor in each pixel does not pass light, there is a problem in that an aperture ratio between liquid crystals, that is, a ratio of light passing through the pixel with respect to incident light, is reduced.

Techniques for solving these problems are described in the paper IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. 36, NO. 12, pages p2949-2952 of DECEMBER 1989. (Title: A New Address Scheme to Improve the Quality of a-Si TFT / LCD Panels) A feature of the technique disclosed in the above paper is another second capacitor in addition to the storage capacitor connected to the source node of the switching transistor in the configuration of FIG. By suppressing the DC voltage applied to the source node, the noise and the sticking effect due to the flickering operation of the display can be suppressed. However, such a technique causes the following problems. First, as a capacitor connecting the pixel electrode and the adjacent gate line is added, a gap ratio decreases. Second, since the gate voltage has to be applied in two stages according to time, it is difficult to implement the voltage waveform and requires the accurate synchronization of the gate voltage over time. Third, an increase in the occupied area on the same substrate according to the second capacitor. This is important in the art to minimize the footprint if possible on the same substrate, which can be evaluated as a difficult technical realization.

Accordingly, an object of the present invention is to provide an LCD having a pixel element with improved current driving capability.

Another object of the present invention is to provide an LCD having a pixel element having a large capacitance.

Another object of the present invention is to provide an LCD having a pixel element that realizes a large capacity of a storage capacitor without increasing the occupying area.

Another object of the present invention is to provide an LCD having a pixel element having a large capacitance and an improved current driving capability.

It is still another object of the present invention to provide a method of manufacturing a pixel device in which a large capacitance and a current driving capability are improved.

It is still another object of the present invention to provide a method of manufacturing a pixel device to maximize the capacitance of a storage capacitor without increasing the footprint.

It is still another object of the present invention to provide a method for manufacturing a TFT that at least doubles the current driving capability without increasing the footprint.

In order to achieve the objects of the present invention, the present invention provides a switching transistor comprising a gate terminal to which a predetermined voltage is applied, a drain terminal to which a predetermined data signal is input, and a source terminal connected to a predetermined node, and the source terminal. The present invention is directed toward an LCD having a pixel element made of a storage capacitor connected between both ends of a predetermined electrode node.

The switching transistor of the pixel device according to the present invention is characterized in that the switching transistor having at least two current paths.

A storage capacitor connected to a switching transistor of a pixel element according to the present invention has a structure in which electrodes are surrounded by an oxide film, and all parts of the oxide film serve as capacitances.

In the method of manufacturing a pixel device according to the present invention, a non-doped first polycrystalline silicon is laminated on a transparent substrate (for example, glass, quartz) or a silicon substrate and limitedly etched to form a first channel, a source, and a drain. A first process, a second process of stacking gate electrodes on an upper surface of the first channel, an insulating film spacer surrounding sidewalls of the gate electrode, and forming second polysilicon on the front surface of the substrate to a predetermined thickness And a fourth step of forming a second channel by implanting ions into an upper portion of the gate electrode among the stacked portions of the second polycrystalline silicon.

The invention will in particular be noted that in contrast to the prior art there is at least the same occupied area on the same substrate and transverse, as will be apparent from the description which follows.

This will be described in detail with reference to the accompanying drawings, preferred embodiments of the present invention. It should be noted that the same parts in the drawings represent the same reference signs wherever possible.

In the following description, specific details such as the respective conductivity types of the source region and the drain region, each manufacturing process, etc. are shown to provide a more general understanding of the present invention. It will be apparent to those skilled in the art that the present invention may be practiced without these specific details or through modified implementation of these specific details.

The term switching transistor as used herein constitutes a pixel element, which represents a transistor that is responsible for data transfer and consists of a TFT. The common electrode refers to an electrode that receives a voltage applied to the other electrode of a storage capacitor connected to one electrode of a source node of the switching transistor.

3 shows an equivalent circuit of a unit pixel device having a switching transistor and a storage capacitor according to the present invention. As shown in FIG. 3, a plurality of unit pixels may exist in the row and column directions.

In the configuration of FIG. 3, the switching transistors 12A and 12B according to the present invention show two front wheel paths, which will be made in the following description. In addition, the capacity of the storage capacitor 14 in the configuration of FIG. 3 is at least twice that of the storage capacitor 4 as shown in FIG. 1, which will be apparent from the process description below. As can be seen from the configuration of FIG. 3, the switching transistors 12A and 12B according to the present invention have a value of 2 than the conventional method in transferring the voltage on the data line to the source node 18 when the gate voltage V (i) is applied high. It is driven by the power of the ship.

4A to 4D are process drawings showing a manufacturing method for realizing the configurations of the switching transistors 12A and 12B of FIG.

The manufacturing process shown in Figure 4a is as follows. The first oxide layer 24 and the undoped first polysilicon 26 are sequentially stacked on the substrate 22. In this case, the first oxide layer 24 may be omitted, for example, when using a transparent substrate. A second oxide film 28 is deposited on the first polycrystalline silicon 26 and a gate electrode 30 is stacked on the second oxide film 28. A third net oxide 32 is laminated on the gate electrode, and a photoresist 34 is formed on the third oxide film 32. Then, the second oxide film 28, the gate electrode 30, and the third oxide film 32 are limitedly etched only in predetermined regions. This etching process is possible by a well-known etching process.

The manufacturing process shown in Figure 4b is as follows. After the same process as in FIG. 4A, n-ion implantation is performed in the inner portion of the predetermined region on the exposed polycrystalline silicon 26, and an n-region 38 is formed on the polycrystalline silicon 26. The photoresist 34 is then removed, and an insulating film spacer 36 is formed around the sidewalls of the stacked spheres consisting of the second oxide film 28, the gate electrode 30, and the third oxide film 32.

The manufacturing process shown in Figure 4c is as follows. After the process of 4b, the second polysilicon 42 undoped on the front surface of the substrate is deposited to a predetermined thickness. Then, photoresist 44 is formed on the second polycrystalline silicon 42 on the laminated structure portion in which the gate electrode 30 exists, and then n + ions are implanted onto the second polycrystalline silicon 42 except for the laminated structure.

The structure obtained through such a process is the same as that of FIG. In other words, an n + layer serving as a source and a drain region is formed in a portion except the stacked structure. In the configuration of 4d, the oxide film 40 is wrapped around the gate electrode 30. As can be easily seen in the illustrated configuration, the current paths between the source and drain regions are respectively formed on the upper and lower sides of the gate electrode. It can be seen that two passages are formed.

Turning now to FIG. 3 again, the switching transistors 12A and 12B in FIG. 3 are implemented by the configuration as in FIG. 4d, from which the front-wheel drive capability is easily predicted to be twice that of the prior art.

Returning to FIG. 3, the transistors implemented through the manufacturing process shown in FIGS. 4A to 4B become the switching transistors 12A and 12B of FIG. The switching transistors 12A and 12B are connected to a control terminal in common with V (i), respectively, and this configuration consists of the gate electrode 30 in FIG. 4d.

Meanwhile, in FIG. 3, the manufacturing method of the storage capacitor 14 according to the present invention is performed as shown in FIGS. 5A to 5D of FIG.

The manufacturing process shown in Figure 5a is as follows. The first oxide film 54 and the undoped first polysilicon 56 are sequentially stacked on the substrate 52. In this case, the first oxide layer 24 may be omitted, for example, when using a transparent substrate. Then, n ⁺ ion implantation is carried out in a predetermined region 58 for forming a predetermined stacked structure on the first polycrystalline silicon 56, and the predetermined region 58 is made an n ⁺ layer. A second oxide film 60 is deposited on the first polycrystalline silicon 56 and a common electrode 62 is laminated on the second oxide film 60. A third oxide film 64 is laminated on the common electrode 62, and a photoresist 66 is formed on the third oxide film 64. Thereafter, only a predetermined region of the second oxide film 60, the common electrode 62, and the third oxide film 64 are etched. The visual process is possible by a known etching process.

The manufacturing process shown in Figure 5b is as follows. After the same process as in FIG. 5A, n ⁺ ion implantation is performed on the exposed polysilicon 56 to form an n ⁻ region 68 on the polysilicon 56. Then, the photoresist 66 is removed, and an insulating film spacer 70 is formed to surround sidewalls of the stacked structure including the second oxide film 60, the common country 62, and the third oxide film 64.

The manufacturing process shown in Figure 5c is as follows. After the process shown in FIG. 5B, the second polycrystalline silicon 72 undoped on the front surface of the substrate is deposited to a predetermined thickness, and n ⁺ ion implanted onto the second polycrystalline silicon 72.

The structure obtained through such a process is the same as FIG. 5d. In other words, an n ⁺ layer serving as a source and a drain region is formed in a portion except the stacked structure. Since the second polysilicon 72 serves as a storage electrode, the insulating film surrounding the common electrode 62 serves as a dielectric film of the capacitor. Therefore, the capacitor capacity between the common electrode 62 and the second polysilicon 72 becomes at least twice as large as that of the storage capacitor in the pixel shown in FIG.

Returning to FIG. 3 again, the equivalent circuit of the storage capacitor in the configuration of FIG. 3 appears to be the same as the conventional one, but it is obvious that the capacity of the capacitor is at least twice as determined with reference to FIG. 5D.

As described above, the switching transistors 12A and 12B of FIG. 3 are implemented through the processes of FIGS. 4A through 4D, and the storage capacitor 14 of FIG. 3 is implemented through the processes of FIGS. 5A through 5D. The improvement of the and the enlargement of the capacitance are made, which clearly supports the achievement of the stated objects of the present invention.

In addition, it is shown in FIG. 6 to show the improvement of the current driving capability by the configuration of the pixel element according to the present invention. FIG. 6 is a diagram showing voltage waveforms of a pixel device according to the present invention, which is confirmed through simulation by the present inventors. That is, assuming that W / L = 50/10 μm (W = wodth, L-length) of the TFT transistors constituting the pixel element, the current flowing through the drain of the TFT transistor is lower than that of the conventional TFT represented by dotted lines. The TFT of the present invention shown by the solid line is supported by the deposition of a remarkably large current driving capability.

The above-described equivalent circuit configuration of FIG. 3 is an optimal embodiment implemented based on the technical idea of the present invention, and FIGS. 4A to 4D and 5A to 5D are the configuration of FIG. It is the process of performing optimally. However, it can be easily predicted in the art that such a process can be made different by technological advances. In addition, although the equivalent circuit of the transistor of the pixel device according to the present invention is shown in FIG. 3, it is obvious to those skilled in the art that the equivalent circuit may be shown differently.

As described above, the present invention provides a pixel node having the same occupied area of an ordinary pixel element employing a TFT transistor in an LCD while increasing current driving capability and capacitance, thereby providing a source node that becomes a liquid crystal node. There is an advantage that the charge time of the current becomes high. In addition, the conventional Morse process has the advantage of ensuring at least twice the capacitance compared to the conventional without increasing the occupied area, and also has the effect of facilitating the layout on the same substrate in the future. In addition, there is an effect that these advantages are achieved through an easy manufacturing process. In addition, it is possible to minimize the effects of parasitic capacitance without reducing the gap ratio of the LCD.

Claims (4)

A liquid crystal display device in which screen display is performed by a pixel element including a source node which becomes a predetermined liquid crystal node, wherein the pixel element is controlled connected to a voltage line connected to a predetermined voltage supply source, and to the voltage line. And a first switching transistor having a current path formed between the data line and the liquid crystal node and a second switching transistor controlledly connected to the voltage line and having a current path formed between the data line and the liquid crystal node. Display device. The liquid crystal display device according to claim 1, wherein the pixel element further comprises a storage capacitor connected between a predetermined electrode intensity and the liquid crystal node at both ends of the electrode. A liquid crystal display device using a thin film transistor as a pixel element, wherein the thin film transistor is located at one side of the gate electrode, a source region formed as a first conductive type, and positioned at the other side of the gate electrode. And a first current path formed in a lower direction of the gate electrode, and a second current path formed in an upper direction of the gate electrode. A pixel device manufacturing method of a liquid crystal display device in which screen display is performed by a pixel device including a thin film transistor connected to a predetermined liquid crystal node, wherein the thin film transistor stacks undoped first polycrystalline silicon on a substrate. Forming a first channel, a source, and a drain by limited etching; a second process of forming a gate electrode stacked on an upper surface of the first channel; and forming an insulating layer spacer surrounding sidewalls of the gate electrode. And depositing a second polysilicon to a predetermined thickness on the entire surface of the substrate, and forming a second channel by implanting ions into the upper portion of the gate electrode among the stacked second polycrystalline silicon. A method of manufacturing a pixel element of a liquid crystal display device, characterized in that.