KR960702940A - METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR BODY HAVING A SURFACE PROVIDED WITH A MULTILAYER WIRING STRUCTURE - Google Patents

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR BODY HAVING A SURFACE PROVIDED WITH A MULTILAYER WIRING STRUCTURE

Info

Publication number
KR960702940A
KR960702940A KR1019950705487A KR19950705487A KR960702940A KR 960702940 A KR960702940 A KR 960702940A KR 1019950705487 A KR1019950705487 A KR 1019950705487A KR 19950705487 A KR19950705487 A KR 19950705487A KR 960702940 A KR960702940 A KR 960702940A
Authority
KR
South Korea
Prior art keywords
manufacturing
multilayer wiring
wiring structure
surface provided
semiconductor device
Prior art date
Application number
KR1019950705487A
Other languages
Korean (ko)
Other versions
KR100374527B1 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR960702940A publication Critical patent/KR960702940A/en
Application granted granted Critical
Publication of KR100374527B1 publication Critical patent/KR100374527B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
KR1019950705487A 1994-04-07 1995-03-17 Semiconductor device manufacturing method KR100374527B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP94200940.8 1994-04-07
EP94200940 1994-04-07

Publications (2)

Publication Number Publication Date
KR960702940A true KR960702940A (en) 1996-05-23
KR100374527B1 KR100374527B1 (en) 2003-05-09

Family

ID=8216774

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950705487A KR100374527B1 (en) 1994-04-07 1995-03-17 Semiconductor device manufacturing method

Country Status (3)

Country Link
JP (1) JPH08511659A (en)
KR (1) KR100374527B1 (en)
WO (1) WO1995028000A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6046100A (en) * 1996-12-12 2000-04-04 Applied Materials, Inc. Method of fabricating a fabricating plug and near-zero overlap interconnect line
CN100416409C (en) * 2001-03-29 2008-09-03 大日本印刷株式会社 Method for making electronic component using wet corrosion agent
DE10320166B4 (en) * 2002-05-16 2007-06-06 Dalsa Corp., Waterloo Pixel design for CCD image sensors
WO2008013402A1 (en) * 2006-07-25 2008-01-31 Lg Chem, Ltd. Method of manufacturing organic light emitting device and organic light emitting device manufactured by using the method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4176029A (en) * 1978-03-02 1979-11-27 Sperry Rand Corporation Subminiature bore and conductor formation
EP0282820A1 (en) * 1987-03-13 1988-09-21 Siemens Aktiengesellschaft Method for producing contact holes with sloping walls in intermediate oxide layers
DE3914602A1 (en) * 1989-05-03 1990-11-08 Bosch Gmbh Robert Tapering via prodn. esp. in multilevel circuits - by etching insulation layers with different etch rates
US4943539A (en) * 1989-05-09 1990-07-24 Motorola, Inc. Process for making a multilayer metallization structure
EP0523856A3 (en) * 1991-06-28 1993-03-17 Sgs-Thomson Microelectronics, Inc. Method of via formation for multilevel interconnect integrated circuits
US5246883A (en) * 1992-02-06 1993-09-21 Sgs-Thomson Microelectronics, Inc. Semiconductor contact via structure and method

Also Published As

Publication number Publication date
WO1995028000A2 (en) 1995-10-19
KR100374527B1 (en) 2003-05-09
EP0704105A2 (en) 1996-04-03
WO1995028000A3 (en) 1995-12-28
JPH08511659A (en) 1996-12-03

Similar Documents

Publication Publication Date Title
GB2326765B (en) Method of manufacturing semiconductor device having multilayer wiring
GB2290166B (en) Manufacturing method for a wiring structure of a semiconductor device
DE69534709D1 (en) Manufacturing method of a semiconductor device
DE69309817D1 (en) Manufacturing method of a semiconductor light-emitting device
EP0415537A3 (en) Wiring contact portion of a semiconductor device and method for manufacturing the same
EP0517551A3 (en) Method of forming a multilayer wiring structure on a semiconductor device
DE69634289D1 (en) Manufacturing method of a semiconductor device
EP0543364A3 (en) Method for manufacturing polyimide multilayer wiring substrate
EP0552968A3 (en) Semiconductor device including a wiring layer
EP0168828A3 (en) Semiconductor device having wiring layers and method for manufacturing the same
EP0444695A3 (en) Semiconductor device having multilayered wiring structure and method of manufacturing the same
KR970006731B1 (en) Method of manufacturing a semiconductor ic device having multilayer interconnection structure
KR960015801A (en) Semiconductor chips and electronic modules with integrated surface interconnects and devices and methods of manufacturing the same
FI952719A (en) A method of manufacturing a semiconductor device
EP0301565A3 (en) Semiconductor device comprising a wiring layer
DE69333864D1 (en) Manufacturing method for semiconductor device with capacitor
DE69317012D1 (en) Method of manufacturing a connection structure in an integrated circuit
GB9414996D0 (en) A highly integrated semi-conductor wiring structure an a method for manufacturing the same
KR970700941A (en) A substrate and method for connecting an integrated circuit to another substrate by balls
GB2317746B (en) Semiconductor device having wiring layers and method of fabricating the same
KR900010934A (en) Method for manufacturing a semiconductor device having a semi-conductor-on-insulator structure and a semi-conductor-on-insulator structure
FI956099A (en) A method of manufacturing a semiconductor device
KR960702940A (en) METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR BODY HAVING A SURFACE PROVIDED WITH A MULTILAYER WIRING STRUCTURE
DE69625007D1 (en) A semiconductor device manufacturing method
DE69531480D1 (en) Multi-layer connection of a semiconductor device and manufacturing method

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee