KR960036785A - Affine Converter for 3D Graphics Parallel Processing - Google Patents

Affine Converter for 3D Graphics Parallel Processing Download PDF

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Publication number
KR960036785A
KR960036785A KR1019950006625A KR19950006625A KR960036785A KR 960036785 A KR960036785 A KR 960036785A KR 1019950006625 A KR1019950006625 A KR 1019950006625A KR 19950006625 A KR19950006625 A KR 19950006625A KR 960036785 A KR960036785 A KR 960036785A
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South Korea
Prior art keywords
image data
affine
dimensional image
dimensional
output
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KR1019950006625A
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Korean (ko)
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KR0181058B1 (en
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최한호
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배순훈
대우전자 주식회사
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00Geometric image transformations in the plane of the image
    • G06T3/02Affine transformations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/436Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2200/00Indexing scheme for image data processing or generation, in general
    • G06T2200/28Indexing scheme for image data processing or generation, in general involving image processing hardware

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Image Processing (AREA)

Abstract

본 발명은 3차원 그래픽 병렬처리를 위한 아핀변환 장치에 관한 것으로, 프레임 단위로 입력되는 3차원 영상데이타가 4×4, 즉 16개의 부블럭으로 분할되어 16개의 AT연산부에서 AT연산이 병렬처리되며, 카운터에서 16개의 AT연산부의 AT연산횟수가 계수되어 기설정된 소정횟수가 되면 카운터로부터 종료신호가 발생되어 16개의 버퍼에 각각 저장되어 있는 부블럭의 3차원 영상데이타가 최종적으로 출력되고, 후처리부에서 2차원 이미지로서 좌표변환되어 모니터에 디스플레이되므로써, 애니매이션 풍경용 3차원 그래픽 처리를 고속으로 처리할 수 있도록 한 것이다.The present invention relates to an affine transformation apparatus for 3D graphics parallel processing, wherein 3D image data input in units of frames is divided into 4 × 4, that is, 16 sub-blocks, so that AT operations are processed in 16 AT operations in parallel. When the AT operation count of the 16 AT calculation units is counted by the counter and the predetermined number of times is set, the end signal is generated from the counter, and the 3D image data of the sub-blocks stored in the 16 buffers is finally output. By transforming the coordinates as a two-dimensional image, and displaying them on a monitor, it is possible to process three-dimensional graphics for an animated landscape at high speed.

Description

3차원 그래픽 병렬처리를 위한 아핀변환 장치Affine Converter for 3D Graphics Parallel Processing

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 바람직한 실시예에 따라 3차원 그래픽 병렬처리를 위한 아핀변환 장치의 개략적인 블럭구성도, 제2도는 제1도의 각 AT연산부의 상세도, 제3도는 본 발명에 일예로서 프레임별 3차원 영상 신호를 4×4의 부블럭으로 분할한 것을 도시한 도면.1 is a schematic block diagram of an affine transformation apparatus for three-dimensional graphics parallel processing according to a preferred embodiment of the present invention, FIG. 2 is a detailed view of each AT operation unit of FIG. 1, and FIG. 3 is a frame as an example of the present invention. 3D video signal divided into 4x4 subblocks.

Claims (3)

3차원 이미지를 갖는 영상신호를 3차원 그래픽 처리하는 아핀변환 장치에 있어서, 설정된 소정수의부블록으로 분할되어 순차적으로 입력되는 상기 3차원 이미지를 갖는 영상데이타와 복수개의 아핀변환수단에서 아핀변환된 각 3차원 영상데이타를 외부로부터의 클럭에 의한 선택신호에 의거하여 선택적으로출력하기 위한 복수개의 선택수단; 상기 복수개의 선택수단에 각각 대응하여 상기 복수개의 선택수단으로 부터 출력되는 각 3차원 영상데이타를 아핀변환하기 위한 상기 복수개의 아핀변환수단; 상기복수개의아핀변환수단에 각각 대응하여 상기 각 아핀변환수단에서 아핀변환된 부블럭의 3차원 영상데이타들을 각각 지정한 다음 카운터로부터의 종료신호에 의거하여 상기 저장된 부블럭의 3차원 영상데이타들을 각각 출력하는 복수개의 메모리수단; 상기 복수개의 아핀변환수단의 연산횟수를 계수하여 기설정된 소정횟수가 되면 상기 종료신호를 발생하여 상기 복수개의 메모리수단에 각각 제공하여 상기 카운터; 상기 복수개의메모리수단으로부터 출력되는 부블럭의 3차원의 영상데이타를 각각 입력한 다음 좌표변환하여 2차원 이미지로서 모니터에 디스플레이될 수 있도록 처리하기 위한 후처리수단으로 이루어진 것을 특징으로 하는 3차원 그래픽 병렬처리를 위한 아핀변환 장치.In the affine conversion device for processing a three-dimensional graphics image signal having a three-dimensional image, the affine conversion in the plurality of affine conversion means and the image data having the three-dimensional image is sequentially divided into a predetermined number of sub-blocks A plurality of selection means for selectively outputting three-dimensional image data based on a selection signal by a clock from the outside; A plurality of affine converting means for affining each three-dimensional image data output from the plurality of selecting means in correspondence with the plurality of selecting means, respectively; The 3D image data of the subblocks affine transformed by the affine transformation means respectively corresponding to the plurality of affine transformation means are respectively output, and the 3D image data of the stored subblocks are output based on an end signal from the counter. A plurality of memory means; Counting the number of arithmetic operations of the plurality of affine conversion means to generate a termination signal and providing the termination signal to the plurality of memory means, respectively; Three-dimensional graphics parallel, characterized in that the post-processing means for inputting the three-dimensional image data of the sub-blocks output from the plurality of memory means, and then transform the coordinates to be displayed on the monitor as a two-dimensional image Affine converter for treatment. 제1항에 있어서, 상기 선택수단으로 입려되는 3차원 영상데이타는, 4×4의 블럭으로 분할되어 입력되는 것을 특징으로 하는 3차원 그래픽 병렬처리를 위한 아핀변환장치.The affine transformation apparatus for three-dimensional graphics parallel processing according to claim 1, wherein the three-dimensional image data to be input to the selecting means is divided into 4 × 4 blocks and inputted. 제1항에 있어서, 상기 아핀변환수단은, 상기 선택수단으로부터 출력되는 각 3차원 영상데이타와 제1 변환계수를 승산하기 위한 복수개의 승산기; 상기 각 승산기에 대응하여 연결되며 상기 복수개의 승산기에서 승산된 각 3 차원 영상데이타와 제 2 변환계수를 가산하기 위한 복수개의 가산기로 구성된 것을 특징으로 하는 3차원 그래픽 병렬처리를 위한 아핀변환 장치.2. The apparatus of claim 1, wherein the affine conversion means comprises: a plurality of multipliers for multiplying each of the three-dimensional image data output from the selection means and a first conversion coefficient; And a plurality of adders connected to the respective multipliers and configured to add each of the three-dimensional image data multiplied by the plurality of multipliers and a second transform coefficient. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950006625A 1995-03-28 1995-03-28 Affine transformer for parallel processing the 3-dimension graphics KR0181058B1 (en)

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Application Number Priority Date Filing Date Title
KR1019950006625A KR0181058B1 (en) 1995-03-28 1995-03-28 Affine transformer for parallel processing the 3-dimension graphics

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KR960036785A true KR960036785A (en) 1996-10-28
KR0181058B1 KR0181058B1 (en) 1999-05-01

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