KR960028054A - Apparatus and method for generating and receiving basic clock of additional communication system - Google Patents

Abstract

The present invention relates to basic clock control of an additional communication system. In particular, the present invention relates to a basic clock generation and reception of an additional communication system that enables interworking and non-interworking between a network and the additional communication system to be realized on one logic circuit. It relates to an apparatus and a method thereof.

That is, the present invention can receive a basic clock from the network in the additional communication system, it is possible to generate a basic clock in the terminal system, the base clock generation and the interworking and non-interlocking between the network and the terminal system and It is an object of the present invention to provide an apparatus and method for reception.

Accordingly, since the interworking and non-interlocking between the network and the terminal system can be realized as one logic circuit, it is possible to unify the appropriate circuit configuration for the generation and reception of the basic clock in the additional communication system, thereby efficiently operating the basic clock. .

Description

Apparatus and method for generating and receiving basic clock of additional communication system

Since this is an open matter, no full text was included.

2 is an operation timing diagram of a basic clock according to the present invention, FIG. 3 is a detailed configuration diagram of the clock section shown in FIG. 1, and FIG. 4 is a detailed configuration diagram of the clock generation section shown in FIG.

Claims (2)

An apparatus for generating and receiving a basic clock of a system according to a state of a clock generation control signal and a clock reception control signal in a terminal system of an additional communication system, the apparatus comprising: receiving and dividing an AC signal of a predetermined frequency generated by an oscillator and outputting the divided signal; One counter 421; A first buffer 431 which is latched when the clock generation control signal / DRV is the first level and outputs the signal divided by the first counter 421 to the generation clocks / GC2M and / GC4M; ; When the clock reception control signal (/ RCV) is at the first level and the clock generation control signal (/ DRV) is at the second level, the reception clocks (/ SCNTCLR, / SC2M, / SC4M) from the network are latched and the basic clock is left as it is. /CNTCLR./C2M, / C4M), when the clock generation control signal (/ DRV) is the first level and the clock reception control signal (/ RCV) is the second level, the generation clock (/ GC2M) and the bias voltage ( A second buffer 432 for latching Vcc and outputting the clock / TC2M and the high signal AA; When the clock signal is generated in the system itself, the D flip-flop 410 latches and outputs the high signal AA applied from the second buffer 432 according to the clock / TC2M applied from the first buffer 431. )and; A first logical sum gate 441 for receiving the output signal of the D flip-flop 410 and the generation clock (/ GC2M) of the first buffer 431 and performing logical sum operation to output the result; The operation result of the logic sum gate 441 applied through the clear stage CLR is counted according to the generation clock / GC2M applied from the first buffer 431, and the result is counted through the first output stage RCO. A third counter 423 outputting through a second counter 422 and a first output terminal RCO and a second output terminal / CEN; And a clock generator 320 including a second logical sum gate 442 for performing an OR operation on the results counted by the second and third counters 422 and 423 and outputting the result to the generation clock (/ GCNTCLR). Apparatus for generating and receiving the basic clock of the additional communication system. A method for generating and receiving a basic clock of an additional communication system, the method comprising: a first step of confirming whether the additional communication system directly connects a plurality of subscriber lines; In case of the direct connection in the first process, it is checked whether the clock generation control signal / RCV is the first level and the clock reception control signal / DRV is the second level. A second process of doing; A third step of generating and outputting a predetermined generation clock (/ GCNTCLR, / GC2M, / GC4M) in the system by the second step; A third step of receiving and outputting a basic clock from the network when the additional communication system is indirectly connected through an exchange which forms a network without directly connecting a plurality of subscriber lines in the first step; A fourth step of checking whether the clock reception control signal / DRV is the first level and the clock generation control signal / RCV is the second level in the first step, and stopping the generation of the clock if the clock generation control signal / RCV is the second level; And a fifth process of receiving the received clocks (/ SENTCLR, / SC2M, / SC4M) received from the network by the fourth process and outputting the received clocks (/ CNTCLR, / C2M, / C4M) interlocked with the network. A method for generating and receiving a basic clock of an additional communication system. ※ Note: The disclosure is based on the initial application.