KR960026923A - Method of forming ohmic contact electrode of semiconductor device - Google Patents

Method of forming ohmic contact electrode of semiconductor device Download PDF

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KR960026923A
KR960026923A KR1019940036027A KR19940036027A KR960026923A KR 960026923 A KR960026923 A KR 960026923A KR 1019940036027 A KR1019940036027 A KR 1019940036027A KR 19940036027 A KR19940036027 A KR 19940036027A KR 960026923 A KR960026923 A KR 960026923A
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South Korea
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layer
forming
ohmic metal
ohmic
film
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KR1019940036027A
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Korean (ko)
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KR0163741B1 (en
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윤형섭
이진희
양전욱
박철순
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양승택
재단법인 한국전자통신연구소
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/452—Ohmic electrodes on AIII-BV compounds
    • H01L29/454—Ohmic electrodes on AIII-BV compounds on thin film AIII-BV compounds

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

본 발명은 고전자 이동도 트랜지슬(HEMT),금속-반도체 전계효과 트랜지스터(MESFET) 등의 전계효과형 반도체 소자 또는 이종접합 바이폴라 트랜지스터(HBT) 등의 화합물 소자의 오믹접촉 전극 제조방법에 관한 것으로서 ,그 형성방법은, 반절연 갈륨비소 기판(1)상에 채널층(2)과 소오스 전극 및 드레인 전극의 형성을 위한 감광막의 패턴(3)을 형성하는 공정과; 적어도 Ni,Ge, Au으로 된 다층구조의 오믹금속층(4)을 그 위에 형성하는 공정과; 상기 감광막패턴(3)을 제거하여 다층 구조의 오믹금속층으로 된 소오스/드레인 전극을 형성하는 공정과; 그 위에 다층구조의 절연층으로 이루어진 오믹금속보호막을 도포하는 공정과; 상이한 온도에서 2단계로 열처리하는 공정과; 상기 오믹금속보호막을 제거하는 공정과; 소정의 감광막패턴을 그 위에 형성하여 게이트영역을 정의하는 공정과; 금속막을 증착하여 상기 소정의 감광막패턴을 마스크로 사용하여 T-형상의 게이트를 형성하는 공정을 포함한다.이로써, 오믹층의 특성을 향상시킬 수 있다.The present invention relates to a method for manufacturing an ohmic contact electrode of a field effect semiconductor device such as a high electron mobility transistor (HEMT), a metal-semiconductor field effect transistor (MESFET), or a compound device such as a heterojunction bipolar transistor (HBT). The formation method includes the steps of forming a pattern 3 of a photoresist film for forming a channel layer 2, a source electrode and a drain electrode on a semi-insulating gallium arsenide substrate 1; Forming a multi-layered ohmic metal layer 4 of at least Ni, Ge, Au thereon; Removing the photoresist pattern (3) to form a source / drain electrode made of a multi-layered ohmic metal layer; Applying an ohmic metal protective film formed of an insulating layer having a multilayer structure thereon; Heat-treating in two stages at different temperatures; Removing the ohmic metal protective film; Forming a predetermined photosensitive film pattern thereon to define a gate region; And depositing a metal film to form a T-shaped gate using the predetermined photoresist pattern as a mask. Thus, the characteristics of the ohmic layer can be improved.

Description

반도체 소자의 오믹 접촉전극 형성방법Method of forming ohmic contact electrode of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 종래의 전계효과형 반도체 소자의 오믹 접촉전극 형성방법을 보여주는 단면도; 제2도는 본 발명의 반도체 소자의 오믹 접촉전극 형성방법을 보여주는 단면도.1 is a cross-sectional view showing a method for forming an ohmic contact electrode of a conventional field effect type semiconductor device; 2 is a cross-sectional view showing a method of forming an ohmic contact electrode of a semiconductor device of the present invention.

Claims (6)

반도체소자의 오믹접촉전극의 형성방법에 있어서, 반절연 갈륨비소 기판(1)상에 채널층(2)과 소오스 전극 및 드레인 전극의 형성을 위한 감광막의 패턴(3)을 형성하는 공정과; 적어도 Ni Ge Au으로 된 다층구조의 오믹금속층(4)을 그 위에 형성하는 공정과,; 상기 감광막패턴(3)을 제거하여 다층구조의 오믹금속층으로 된 소오스/드레인 전극을 형성하는 공저과; 그 위에 다층구조의 절연층으로 이루어진 오믹금속보호막을 도포하는 공정과; 상이한 온도에서 2단계로 열처리하는 공정과; 상기 오믹금속보호막을 제거하는 공정과; 소정의 감광막패턴을 그 위에 형성하여 게이트영역을 정의하는 공정과; 금속막을 증착하여 상기 소정의 감광막패턴을 마스크로 사용하여 T-형상의 게이트를 형성하는 공정을 포함하는 것을 특징으로 하는 반도체소자의 오믹접촉전극의 형성방법.A method of forming an ohmic contact electrode of a semiconductor device, comprising: forming a pattern (3) of a photoresist film for forming a channel layer (2), a source electrode and a drain electrode on a semi-insulating gallium arsenide substrate (1); Forming a multi-layered ohmic metal layer 4 of at least Ni Ge Au thereon; Removing the photoresist pattern (3) to form a source / drain electrode of a multi-layered ohmic metal layer; Applying an ohmic metal protective film formed of an insulating layer having a multilayer structure thereon; Heat-treating in two stages at different temperatures; Removing the ohmic metal protective film; Forming a predetermined photosensitive film pattern thereon to define a gate region; And depositing a metal film to form a T-shaped gate using the predetermined photoresist pattern as a mask. 제1항에 있어서, 상기 오믹금속층(4)은 전자선 진공증착기에 의해 Ge 를 100~200A, Ni를 100~200A Au를 2000A 두께로 증착하여 Ni/Ge/Au 다층구조 또는 Ge/Ni/Au의 다층구조로 이루어진 것을 특징으로 하는 반도체소자의 오믹접촉전극의 형성방법.The method of claim 1, wherein the ohmic metal layer 4 is formed of a Ni / Ge / Au multilayer structure or a Ge / Ni / Au layer by depositing Ge 100-200 A and Ni 100-200 A Au by 2000 A. A method of forming an ohmic contact electrode of a semiconductor device, characterized in that the multilayer structure. 제2항에 있어서, 상기 오믹금속층(4)은 50~80A 두께의 Ti층을 부가한 다층구조로 이루어진 것을 특징으로 하는 반도체소자의 오믹접촉전극의 형성방법.The method of claim 2, wherein the ohmic metal layer (4) has a multilayer structure in which a Ti layer having a thickness of 50 to 80 A is added. 제3항에 있어서, 상기 오믹금속층(4)은 Ni/Ge/Au/Ti/Au의 다층구조를 갖는 것을 특징으로 하는 반도체소자의 오믹접촉전극의 형성방법.4. A method according to claim 3, wherein the ohmic metal layer (4) has a multilayer structure of Ni / Ge / Au / Ti / Au. 제1항에 있어서, 상기 오믹금속보호막은 산화막(9)과 SixOyNZ절연막층(10)으로 된 적어도 이중층으로 이루어진 것을 특징으로 하는 반도체소자의 오믹접촉전극의 형성방법.The method of claim 1, wherein the ohmic metal protective film is formed of at least a double layer consisting of an oxide film (9) and a Si x O y N Z insulating film layer (10). 제1항에 있어서, 상기 열처리공정은 오믹금속층을 350~370℃의 저온에서 열처리한 다음, 이어 430~450℃의 고온에서 연속적으로 각각 20초동안 열처리하는 것을 특징으로 하는 반도체소자의 오믹접촉전극의 형성방법.The ohmic contact electrode of claim 1, wherein the heat treatment is performed by heating the ohmic metal layer at a low temperature of 350 ° C. to 370 ° C., followed by a continuous heat treatment at a high temperature of 430 ° C. to 450 ° C. for 20 seconds. Method of formation. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940036027A 1994-12-22 1994-12-22 Method for fabricating the ohmic contact electrode of semiconductor devices KR0163741B1 (en)

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KR960026923A true KR960026923A (en) 1996-07-22
KR0163741B1 KR0163741B1 (en) 1998-12-01

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