KR960016482B1 - Semiconductor integrated circuit & method for copper discharge - Google Patents

Semiconductor integrated circuit & method for copper discharge Download PDF

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KR960016482B1
KR960016482B1 KR1019930016096A KR930016096A KR960016482B1 KR 960016482 B1 KR960016482 B1 KR 960016482B1 KR 1019930016096 A KR1019930016096 A KR 1019930016096A KR 930016096 A KR930016096 A KR 930016096A KR 960016482 B1 KR960016482 B1 KR 960016482B1
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copper
thin film
electrolyte
ion
nitrogen
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KR1019930016096A
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Korean (ko)
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KR950007078A (en
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주승기
황규호
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서울대학교 공과대학 교육연구재단
이기준
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

forming an aluminum thin film on the back surface of a silicon wafer having a micro contact window; depositing an insulator on the aluminum thin film according to the structure of the plating apparatus; drying the wafer with a nitrogen after cleaning it in HF solution for a minute to remove a native oxide film of the contacting window around the plating part; forming a Cu thin film by deoxidizing Cu ion in the electrolyte onto the surface of the substrate by applying a constant current between a cathode of the silicon substrate and a copper anode.

Description

[발명의 명칭][Name of invention]

전기도금법에 의한 고집적회로 미세패턴의 구리충전방법Copper Filling Method of Highly Integrated Circuit Micropattern by Electroplating Method

[도면의 간단한 설명][Brief Description of Drawings]

제1도는 본 발명에 관련된 다층 배선구조로 구리가 선택적으로 충전된 형상을 도시하는 단면도.1 is a cross-sectional view showing a shape in which copper is selectively filled in a multilayer wiring structure according to the present invention.

제2도는 구리도금장치의 구조를 나타내는 개략도.2 is a schematic view showing the structure of a copper plating apparatus.

제3도는 제2도의 음극기판을 나타내는 상세도.3 is a detailed view showing the negative electrode substrate of FIG.

제4도는 전착시간에 따른 구리입자크기의 변화를 나타내는 그래프.4 is a graph showing the change of the copper particle size with the electrodeposition time.

제5도는 전류밀도에 따른 구리입자크기변화를 나타내는 그래프.5 is a graph showing the change in copper particle size according to the current density.

제6도는 전류밀도에 따른 구리박막의 두께변화를 나타내는 그래프.6 is a graph showing the change in thickness of the copper thin film according to the current density.

제7도는 전류밀도에 따른 구리박막의 비저항값을 나타내는 그래프.7 is a graph showing the specific resistance value of the copper thin film according to the current density.

제8도는 주사전자현미경(SEM)으로 본 서브마이크론 접촉창에 전착된 구리의 단면도.8 is a cross-sectional view of copper electrodeposited on a submicron contact window as seen by a scanning electron microscope (SEM).

제9도는 젤라틴 첨가로 인해 구리입자크기의 감소효과를 나타내는 SEM사진이다.9 is a SEM photograph showing the effect of reducing the size of copper particles due to the addition of gelatin.

[발명의 상세한 설명]Detailed description of the invention

(기술분야)(Technology)

본 발명은 전기도금법을 이용한 구리금속선 형성방법에 관한 것으로, 특히 금속배선형성시 고집적회로의 종횡비가 큰 서브마이크론 접촉창이나 바이어를 구리로 선택적으로 충전시키는 방법에 관한 것이다.The present invention relates to a method of forming a copper metal wire using an electroplating method, and more particularly, to a method of selectively filling a submicron contact window or a via with a large aspect ratio of a high integrated circuit when forming a metal wiring.

(배경기술)(Background)

현재의 대단위 집적단계(VLSI)에서는 금속배선재료로서 알루미늄과 그 합금재료를 사용하여 주로 스퍼터링법에 의해 금속선을 형성하고 있다.In the current large-scale integration stage (VLSI), metal wires are mainly formed by sputtering using aluminum and alloy materials as metal wiring materials.

그러나 알루미늄으로 금속배선 형성시에는 여러가지 집적회로 신뢰성에 문제를 일으키는 것이 있다.However, when forming a metal wiring with aluminum, there is a problem in the reliability of various integrated circuits.

먼저, 알루미늄 배선시 식각 등을 통해 도선의 폭이 좁아지거나 두께가 얇아지는 부분이 생길때, 이곳의 전류밀도 증가로 배선중간에 공간이 생기며 더욱이 금속선이 끊어질 수 있는 전기적 원자이동현상(electremigration)을 일으킬 수 있다. 또한 기판인 실리콘과의 접점에서 저항성분을 줄이기 위해서 400℃ 정도의 열처리 과정시 실리콘이 알루미늄내로 확산해 들어가면서 접속부에 미세공정을 형성하고 이 자리로 알루미늄이 침투하여 실리콘 표면구조의 변화를 초래하는 알루미늄 접속부 침투현상(junction spiking)을 일으킬 수 있다.First, when the width of the conductor becomes narrow or the thickness becomes thin through etching during aluminum wiring, the electric atom migration phenomenon that creates a space in the middle of the wiring due to the increase of the current density here, and also the metal wire can be broken. May cause Also, in order to reduce the resistance at the contact point with the silicon, the silicon diffuses into the aluminum during the heat treatment at 400 ℃, forming a micro process at the connection, and the aluminum penetrates into this place, causing the change of the silicon surface structure. Junction spiking can occur.

더욱이, 집적도 향상으로 인한 접촉상의 크기감소와 비등방성 식각으로 인한 표면 요철심화로 금속선 형성공정에 있어 등각계단도표(conformal step coverage)와 선택적 금속막 형성이 필수적인 과제가 되었다.In addition, conformal step coverage and selective metal film formation have become essential in the metal line forming process due to the reduction in the size of the contact phase due to the improved integration and the deep surface irregularities due to the anisotropic etching.

결국, 플라즈마화된 불활성기체를 가속시켜 금속표적을 때려 튀어나오는 원자들을 기판위에 증착시키는 스퍼터링법에 의해서는 깊어진 접촉상, 특히 배선공정 직전의 비등방성 식각으로 인한 가파른 경사면을 균일하게 덮을수 있는 계단도포성(step coverage)이 떨어지게 된다.As a result, the sputtering method of accelerating the plasma-activated inert gas and depositing atoms protruding from the metal target on the substrate, which can evenly cover the deep contact phase, especially the steep slopes caused by anisotropic etching immediately before the wiring process. Step coverage is reduced.

한편 전자나 이온의 강력한 충돌에 의해 결정구조가 파괴되는 방사손상의 결함 등으로 소자 신뢰성이 저하되게 된다.On the other hand, device reliability is deteriorated due to defects in radiation damage in which the crystal structure is destroyed by strong collision of electrons or ions.

(발명의 목적)(Purpose of invention)

따라서, 본 발명은 상기와 같은 문제점을 해결하기 위해서 기존의 배선재료인 알루미늄 대신 비저항값이 작은 구리로 대체하고, 기존의 진공열증착법이나 스퍼터링과 같은 물리적 방법이 아닌 전기도금과 같은 전기화학반응에 의해 고집적 미세회로패턴을 구리로 선택적 전착시키는 방법을 제공하는 것이다.Therefore, in order to solve the above problems, the present invention substitutes copper having a small resistivity value instead of aluminum, which is a conventional wiring material, and applies to electrochemical reactions such as electroplating, rather than conventional methods such as vacuum thermal deposition or sputtering. The present invention provides a method for selectively electrodepositing a highly integrated microcircuit pattern with copper.

(발명의 구성)Composition of the Invention

본 발명은 실리콘과 실리콘 산화물의 전기전도도 차이를 이용하여 실리콘위에만 구리를 전착시키는 기술이다. 제2도는 이러한 구리도금장치의 구조를 나타내는 개략도이다.The present invention is a technique for electrodepositing copper only on silicon using the difference in electrical conductivity between silicon and silicon oxide. 2 is a schematic view showing the structure of such a copper plating apparatus.

전기도금법을 이용해서 구리금속선을 형성하는 본 발명은 그 단계별 처리순서에 따라 다음과 같이 나누어진다.The present invention for forming a copper metal wire using the electroplating method is divided as follows according to the step-by-step processing sequence.

먼저 미세접촉상 구조를 갖는 실리콘기판 전체에 균일한 전기장이 걸리도록 실리콘 뒷면에 0.5㎛의 알루미늄을 진공열증착시킨다. 또한 도금장치의 구조에 따라 필요한 알루미늄 박막층위에 절연체를 도포한다.First, 0.5 µm of aluminum is vacuum-heat-deposited on the back surface of silicon so that a uniform electric field is applied to the entire silicon substrate having a microcontact phase structure. In addition, according to the structure of the plating apparatus, an insulator is applied on the necessary aluminum thin film layer.

이러한 알루미늄 박막형성 모습은 제3도에 도시되어 있다.This aluminum thin film formation is shown in FIG.

그다음, 도금부위인 접촉창의 자연산화막을 제거하기 위하여 50 : 1의 불산(HF)에 1분간 산세척을 하고 이온교환수 세척을 거쳐 질소로 건조시킨다.Thereafter, in order to remove the natural oxide film of the contact portion, which is a plating part, the product is pickled with hydrofluoric acid (HF) of 50: 1 for 1 minute and washed with ion-exchanged water and dried with nitrogen.

이어서, 제2도에서 보는 바와 같이 기판인 음극(캐소드)과 구리양극(애노드) 사이에 정전류를 가해 전해액내의 구리이온이 기판표면에 환원되면서 구리박막을 형성하게 된다. 그 다음은 또한 구리전착전과 같이 이 부위를 이온교환수 세척을 하고 질소로 건조시킨다.Subsequently, as shown in FIG. 2, a constant current is applied between the cathode (cathode) and the copper anode (anode), which are substrates, to reduce copper ions in the electrolyte to the surface of the substrate to form a copper thin film. The area is then washed with ion-exchanged water and dried with nitrogen as before copper electrodeposition.

(실시예)(Example)

제1도는 본 발명의 실시예로서 다층배선시 접촉창과 바이어가 구리로 선택적 충전된 모습을 나타낸다.FIG. 1 shows an embodiment in which the contact window and the via are selectively filled with copper in the multilayer wiring.

이하, 예시도면을 참고해서 본 발명의 실시예를 설명한다.Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

제4도는 전류밀도를 2A/d㎡ 고정시키고 전착시간을 30∼300초까지 변화시켰을때 구리입자크기변화를 나타낸다. 즉, 첨가제를 사용하지 않은 경우에 대하여 0.1g/ℓ의 젤라틴 첨가로 15∼20%, 0.2g/ℓ의 경우 50∼60%의 입자크기 감소효과가 발생한다(제9도 참조).4 shows the change in the copper particle size when the current density is fixed at 2 A / dm 2 and the electrodeposition time is changed to 30 to 300 seconds. That is, when the additive is not used, the particle size reduction effect of 15-20% and 50-60% occurs in the case of 0.2 g / L by adding 0.1 g / L of gelatin (see FIG. 9).

또한 제5도는 전착시간을 60초로 고정시키고 전류밀도를 변화시켰을때 구리입자크기변화를 나타낸다.5 shows the change of the copper particle size when the electrodeposition time is fixed at 60 seconds and the current density is changed.

이는 젤라틴 첨가로 젤라틴이 구리결정핵의 선단부에 흡착되어 기존결정의 성장을 억제하고 새로운 핵생성을 조장함으로써 평활하고 치밀한 구리전착막을 얻을 수 있음을 나타내는 것으로서, 결국 전해액(0.75M CuSO4·5H2O+74g/ℓ H2SO4)에 0.2g/ℓ의 젤라틴을 첨가하면 구리입자크기를 0.1㎛ 이하로 감소시켜 크기가 1㎛ 이하의 접촉창이나 바이어에 선택적 구리충전이 가능하게 됨을 알 수 있다(제8도 참조).This as a gelatin was added to the gelatin adsorbed on the leading end of the copper nucleation, indicating that obtained inhibits the growth of existing crystals were smooth and dense film copper deposition by promoting new nucleation, after an electrolytic solution (0.75M CuSO 4 · 5H 2 It can be seen that the addition of 0.2 g / l gelatin to O + 74 g / l H 2 SO 4 ) reduces the copper particle size to 0.1 μm or less, enabling selective copper charging in contact windows or vias of size less than 1 μm. (See Figure 8).

계속해서 제5도와 같은 조건으로 전류밀도에 따른 구리박막의 두께변화를 제6도에 도시하였다. 첨가제 농도에 관계없이 박막의 두께는 전류밀도에 따라 직선적으로 증가하며, 두께증가율은 0.25㎛(A/d㎡)이었다.Subsequently, the thickness change of the copper thin film according to the current density is shown in FIG. Regardless of the additive concentration, the thickness of the thin film increased linearly with the current density, and the thickness increase rate was 0.25 µm (A / dm 2).

한편 제7도는 전류밀도에 따른 구리박막의 비저항값을 도시한다.On the other hand, Fig. 7 shows the specific resistance value of the copper thin film according to the current density.

이러한 비저항값을 갖는 구리박막으로부터 다음과 같은 작용효과를 설명할 수 있다.From the copper thin film having such a specific resistance value, the following operational effects can be explained.

즉, 전류밀도증가에 따른 박막두께의 증가로 면저항이 감소하고, 입자크기의 증가로 비저항이 감소하며 따라서 구리박막의 비저항값을 2.7∼3.0μΩm 정도로 조절할 수 있기 때문에 기존의 금속배선재료인 알루미늄보다 낮은 비저항값을 갖게되어 전기적 원자이동문제를 해결할 수 있다.That is, the sheet resistance decreases with the increase of the current density, and the resistivity decreases with the increase of the particle size. Therefore, the resistivity value of the copper thin film can be adjusted to about 2.7-3.0 μm, which is higher than that of the conventional metal wiring material aluminum. It has a low resistivity value, which can solve the problem of electric atom migration.

더욱이 본 발명은 상온에서 행해지므로 구리가 실리콘내로 확산하여 접합이 파괴되는 문제가 없다.Furthermore, since the present invention is carried out at room temperature, there is no problem that copper is diffused into silicon and the junction is broken.

Claims (3)

전기도금법에 의한 고집적회로 미세패턴의 선택적 구리충전방법에 있어서, 미세접촉상 구조를 갖는 실리콘 웨이퍼뒷면에 알루미늄 박막을 형성하는 단계 ; 도금장치의 구조에 따라 알루미늄 박막층위에 절연체를 도포하는 단계 ; 도금부위인 접촉창의 자연산화막을 제거하기 위해서 50 : 1의 불산에 1분간 산세척한 후 이온교환수 세척을 거쳐 질소로 건조시키는 단계 ; 실리콘 기판인 음극과 구리양극 사이에 정전류를 가해 전해액내의 구리이온이 기판표면에 환원되면서 구리박막을 형성하는 단계 ; 및 상기 구리박막층 부위를 이온교환수 세척을 거쳐 질소로 건조하는 단계로 구성되는 것을 특징으로 하는 미세접촉창의 선택적 충전방법.A selective copper filling method of a highly integrated circuit micropattern by electroplating, the method comprising: forming an aluminum thin film on a back surface of a silicon wafer having a microcontact phase structure; Applying an insulator on the aluminum thin film layer according to the structure of the plating apparatus; In order to remove the natural oxide film of the contact window, which is a plated portion, it is pickled with hydrofluoric acid of 50: 1 for 1 minute and then dried with nitrogen through washing with ion-exchanged water; Applying a constant current between the cathode and the copper anode, which are silicon substrates, to reduce copper ions in the electrolyte to the substrate surface to form a copper thin film; And drying the copper thin film layer portion with nitrogen after washing with ion-exchanged water. 제1항에 있어서, 전해액에 젤라틴을 첨가하는 것을 특징으로 하는 미세접촉창의 선택적 충전방법.The method of claim 1, wherein the gelatin is added to the electrolyte solution. 제1항 또는 제2항에 있어서, 상기 전기도금은 상온에서 이루어지며, 전해액 교반상태에서 정전류도금을 행하는 것을 특징으로 하는 미세접촉창의 선택적 충전방법.The method of claim 1 or 2, wherein the electroplating is carried out at room temperature, and the selective contact method of the micro-contact window, characterized in that the constant current plating is carried out in the stirring state of the electrolyte.
KR1019930016096A 1993-08-19 1993-08-19 Semiconductor integrated circuit & method for copper discharge KR960016482B1 (en)

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