KR960010011B1 - Process for manufacturing plastic pin grid arrays and the product produced thereby - Google Patents

Abstract

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Description

Plastic Pin Grid Array Manufacturing Process

1A is an actual view of a plastic integrated circuit pin grid array mounting having a plurality of protruding encapsulated terminal pins.

1B is a partial top view of an interconnect tape having leads that form a circuit pattern extending from the terminal pins to the edges of holes cut through the tape.

2A is a side cross-sectional view of a terminal pin connected to a TAB tape.

FIG. 2B is a side cross-sectional view of a terminal pin connected to an inverted TAB tape as compared to the tape of FIG. 2A.

3A-3E are a series of steps for driving a TAB tape having terminal pins extending into a plastic integrated circuit pin grid array mounting according to the present invention.

4A-4F are steps for forming a plastic integrated circuit pin grid array mount of the type shown in FIGS. 3 through 3E in which pins are inserted into a mold prior to contacting the TAB tape.

5A-5E are a series of step diagrams for forming a second embodiment of a plastic integrated circuit pin grid array mounting.

6A-6D illustrate a third embodiment of a plastic integrated circuit pin grid array mounting in which the integrated circuit device is bonded to a TAB tape having protruding terminal pins and the tape is coated with a plastic polymer resin together with the pins and the integrated circuit. A series of steps for.

7 is a reel-to-reel operation diagram in which an interconnect tape having fixed pins is coated in a mold and rewound on a reel.

8A-8D are a series of step diagrams for forming a pin grid array adapter mount.

9 is a pin grid array adapter mounting diagram suitable for soldering to a leaded chip carrier.

10 is a pin grid array adapter mounting diagram suitable for soldering to a leadless chip carrier.

11A-11C illustrate replacement pin embodiments as well as soldering processes for securing the pins to the flexible circuit.

12A-12F are a series of steps for forming another embodiment in a pin grid array mounting.

The present invention relates to a wide range of applications, and more particularly to plastic pin grid array processes and the products produced thereby. The plastic pin grid arrays described in particular comprise flexible, semi-rigid electronic circuits, for example tape self-bonding (TAB) tapes having terminal pins electrically connected, polypolymer and optionally coated with resin.

In the prior art, pin grid arrays were made of plastic or ceramic mounting. Plastic pin grid arrays are typically fabricated using printed wiring board (PWB) substrates with small printed circuit patterns that couple coupling pins on integrated circuit chips to input-output (I / O) pins. Multiple layers of these printed circuit patterns are stacked and joined together to form a mount that provides complex interconnects and increased I / O pin count.

There are several important physical properties that significantly improve the operation of the mounted integrated circuit chip compared to the operating characteristics of plastic mounting. These characteristics include higher current conduction capacity, lower dielectric constants for shorter operating delays, and reduced inductance and capacitance. In addition, the circuit of the PWB substrate can be embedded with a metal foil having a light-limited circuit, and therefore has very high accuracy and high conductivity. Ceramic mountings, on the other hand, are made of low conductive metals and contain circuits that cannot be precisely defined.

One disadvantage of TWB substrates is the need to drill and plate the pins to connect them to the circuit. For this reason, the manufacturing process becomes expensive. A second disadvantage is that PWB mounting dissipates less heat than ceramic substrates.

The present invention also includes a conventional TAB for coupling individual lead ends to I / O terminal pads located on the active surface of the integrated circuit chip. Flexible or semi-rigid electronic circuits are typically formed in three general configurations. The first type is a single layer structure which is all metal, the second type is a two layer structure having a metal layer having a dielectric backing such as polyimide, and the third type is adhesive to a dielectric substrate such as KAPTON polyamide. It is a three or four layer construction with one or two metal layers combined.

The formation of plastic injection-molded pin grid arrays is described in the January 10, 1987, issue of Newsletter Vol. The pin grid array described in the above article is not considered to have an interconnect circuit entirely encapsulated by molding in a plastic resin as in the present invention. Also, the terminal pins do not appear to protrude through the circuit. The coating on the edges of the circuit and the fins on both sides of the circuit is an important aspect in the present invention because the interconnection between the pin and the circuit is strengthened and protected from the surroundings after the coating in the polymer resin.

The formation of ceramic pin grid array mounts incorporating TAB tapes is described in a paper titled Synthetic Pin Grid Array Mount by Tsutsumi & Co. and their collaborators described in IEEE 560-563 in 1986. As shown in FIG. 2, the ceramic base has protruding I / O pins. The polyimide film having the copper wiring path has a through hole for the I / O pin. The polyimide membrane is located on the pin and adhesively bonded to the base. Next, the pin is soldered with the wiring path. In this method, the pin and the tape are not coated together but are fixedly bonded between the ceramic cap and the base. This technique exposes the edges of the circuit to the surroundings.

Plastic chip carrier mounting is described in US Pat. No. 4,618,739. The terminal pin is embedded in the base component by a process such as plastic injection molding. The metal plastic tape is bonded on the base component and the pins are bonded to the tape metal by any desired technique such as welding. To facilitate the joining, the through hole in the metal plastic tape is placed at the end contact of the terminal pin. The through-holes allow the metal tape to join the terminal pin ends by techniques such as laser welding. The plastic cover may be adhesively bonded to the base component. The pin grid array is formed of plastic as in the mounting of the present invention. However, the metal tape does not have protruding pins to facilitate the interconnection between the metal tape and the terminal pins. In addition, the metal tape is not coated with plastic but rather adhesively bonded to the plastic so that the edges of the circuit are exposed around.

The above problems and disadvantages can easily be overcome according to the invention in which the terminal pins are inserted through flexible or semi-rigid electronic circuits. Next, after the pins are electrically interconnected to the tape, the pins and the tape are coated in a polymer resin. Suitably, all the edges of the tape and pins are coated and interconnected to minimize the exposure to the bonds. This one-step coating process can easily be carried out with automatic equipment, if desired, and the pin-to-tape bonding is coated to create a highly reliable and less reliable mount.

It is an object of the present invention to provide a process for forming integrated circuit pin grid array mounting that overcomes the problems and disadvantages inherent in integrated pin grid array mounting and prior art methods.

It is another object of the present invention to provide a process for forming integrated circuit chip carrier mounts that can be assembled using integrated pin grid array mounting and automated assembly operated at low cost.

It is another object of the present invention to provide such a process in which an integrated pin grid array mounting and a TAB tape having an integrated circuit chip coupled to the mounting can be tested before casting.

It is another object of the present invention to provide a process for forming an integrated carrier grid that is simple to implement using an integrated pin grid array mount and a single mold step.

It is a further object of the present invention to provide a process for forming a pin grid array adapter mount and a pin grid array adapter mount which is relatively economical to manufacture in a single mold step.

These and other objects will be more apparent from the following detailed description and the same elements are given the same reference numerals and prime or multiple prime numbers represent the same element providing the same function.

Embodiments develop advantages obtained by soldering pins to flexible circuits, namely improved electrical conductivity and increased robustness.

The invention relates in particular to the integrated circuit pin grid mounting 10 shown in FIG. 1A and to the process of forming the mounting 10, for example protruding terminal pins 14 which are tapes for use in the TAB process. Flexible or semi-rigid circuit tape 12 is coated on the polymer resin.

There are three general electronic circuit configurations. Type 1 is a single layer or all metal construction, type 2 is a two layer construction with a metal layer having a dielectric backing such as polyamide, and type 3 is fixed on one or both layers of a dielectric such as KAPTON polyimide. 3 or 4 layer configuration with one or two metal layers bonded together. The electronic circuit of the present invention has a plurality of holes through which the terminal pin passes.

It is described in US Pat. No. 4,677,526 to Muehling, a plastic pin grid array chip carrier coated using a single layer all-metal construction. The terminal pin is formed by bending a metal lead frame before coating. In US Pat. No. 4,667,526, the spacing between pins is large enough to allow electrical insulation between leads. The number of terminals pins is limited as well as the space. By using a metal circuit tape on which terminal pins are fixed according to the invention, no positioning or space limitations are imposed. The number of terminal pins can be as large as desired. In addition, the circuit tape is not used for support because the circuit tape can be as thin as desired.

One ounce copper (0.36 mm (0.0014 inch) thickness) is suitably used in the embodiment of the single layer circuit according to the present invention.

Two-layer circuits are generally formed by electrolytically welding copper onto a dielectric carrier. The carrier is usually a polyimide, for example KAPTON, although other dielectrics such as epoxy glass can be used. Limitations on terminal dielectric carriers must be able to withstand the heat of subsequent mold operation, typically from about 140 ° C to about 260 ° C, and that the overall thickness of the mounting must be within the JEDEL standard with a thickness less than 4.06 mm (0.160 inch) including the lid. will be.

According to the present invention, the dielectric carrier is between about 0.05 mm (0.002 inches) and about 0.76 mm (0.030 inches) thick and suitably between about 0.127 mm (0.005 inches) to about 0.254 mm (0.010 inches) thick. Electrobonded copper is about 1/4 ounce to about 4 ounces (0.009 mm (0.0004 inches) to about 0.142 mm (0.0056 inches) thick) and suitably about 1/2 ounces to about 2 ounces (0.018 mm to about 0.071) mm) (0.0012 inches to about 0.0048 inches) thick).

The three layer circuit consists of refined copper foil adhesively bonded to the dielectric carrier. The fixture is about 0.025 mm (0.001 inch) thick and the copper and polyimide layers are the same thickness as described in the two-layer circuit tape.

Referring to FIGS. 1B, 2A, and 2B, a three layer interconnect tape 18 is shown defining a metal interconnect circuit pattern or layer 20 adhesively bonded to dielectric layer 22. The metal interconnect pattern layer 20 may be formed of any desired material, such as, for example, copper or a copper alloy, while the dielectric layer 22 may be formed of any dielectric material, such as KAPTON polyimide. Within the interconnect tape 18 there are at least one or more and usually a plurality of holes 24 formed to receive the terminal pins 26. Suitably, the holes 24 in the interconnect tape 18 are sized for the tape 18 to mechanically interlock with the iris or slot 28 in the pinhead 30. The hole 24 may be formed of the hole 25 in the metal layer 20 and the hole 27 in the plastic layer 22 by any suitable technique such as photoetching, drilling, stamping or a combination thereof. The diameter of the holes 24 is suitably the same in each of the metal and plastic layers 20 and 22. If desired, the diameter of the holes 27 in the plastic layer 22 is formed to be slightly smaller than the diameter of the holes 25 in the metal layer 20 within the context of the present invention. The diameter of the holes 27 in the plastic layer 22 may be up to about 33% smaller than the holes 25 in the metal layer 20. Suitably, the hole 27 may be up to about 10% smaller than the hole 25. The smaller hole 27 in the plastic layer 22 provides a tighter connection to the pin 26 while reducing the chance of crimping the metal layer 20 when the pin head is inserted into the tape hole 24.

The terminal pin is formed of any electrically conductive material. Suitable materials with better electrical conductivity and coefficient of thermal expansion that closely match that of the coated polymer resin are copper or copper alloys. Generally, copper alloys containing very strong components such as phosphorus are used.

The pinhead 30 of the pin 26 suitably has a V-shape 32 between the slot 28 and the top surface 34 of the pinhead 30. The V-shaped 32 is formed so that the insertion of the pin 26 into the hole 24 does not crimp the tape 18. Although the V-shaped shape of the pin is shown, within the context of the present invention, the pin head 30 may be formed in any desired shape to facilitate the insertion of the pin 26 into the hole 24. For example, the pinhead 30 may have a curved or columnar shape. The pinhead 30 suitably has a diameter slightly larger than the diameter of the hole 24. Suitably, the maximum outer diameter of the pinhead 30 is about 5% to about 15% greater than the inner diameter of the hole 25 of the metal layer 20. The outer diameter of the pin head 30 is larger than the inner diameter of the hole 25 to ensure electrical contact with the metal layer 20. At the same time, if the outer diameter of the pin head 30 is too large, that is, about 15% or more larger than the diameter of the hole 25, the metal of the metal layer 20 is crimped and torn. It is also realized that the outer diameter of the pin head 30 is large enough that the terminal pin carries a sufficient contact area of the tape to which the tape does not bend. In addition, within the aspect of the present invention, the outer diameter of the pin head 30 is formed to be smaller than or equal to the diameter of the hole 24. Once pin 26 is inserted into TAB tape 18, it involves a centerline 36 that is substantially perpendicular to plane 38 extending through TAB tape 18.

Terminal pin 26 may also include a shoulder or collar 39 forming a seat for terminal tape 18. The collar 39 acts as a stop for securing the tape 18 into the groove 28. The collar 39 also supports the tape 18. In FIG. 2A, tape 18 is positioned in slot 28 such that dielectric layer 22 contacts shoulder 39. As shown in FIG. 2A, the orientation of tape 18 as pin 26 may be used in each of the embodiments described above. However, also within the context of the present invention, the tape 18 can be inverted relative to the pin 26 as shown in FIG. 2B. In this embodiment, the metal layer is in direct contact with the shoulder 39 of the pin 26. Good electrical connection between the tape 18 and the terminal pin 26 without other coupling can result from this orientation. The tape 18 may also be coupled to the collar 39 of the pin 26 by means such as solder 42. The pin 26 may also include a tapered cone bag 40 to self-center the pin 26 at the hole in the mold as described above.

Referring to FIG. 1B, a partial top view of an interconnect tape 18 defining a metal interconnect circuit pattern 20 is shown. The tape 18 includes a number of leads 21 extending through this tape. Any number of holes can be provided. The circuit pattern 29 determines the number of leads 21. These leads extend at least to the holes 23 extending through the tape 18. The terminal pins 26 extend outwardly from the surface of the interconnect tape 18. In FIG. 1B, the pin head 30 is shown connected to the circuit pattern.

Even after the pins 26 are inserted into the interconnect tape 18, they are properly fixed into the holes 24 to ensure mechanical permanent and electrical contact between the pins 26 and the metal circuit layer 20. To ensure further electrical permanence, the tape can be coupled to the pin 26 by any conventional means, such as soldering, brazing or welding. In a suitable embodiment, the pinhead 30 is coated with solder 42. In addition, the metal layer 20 adjacent to the pinhead 30 may be coated with solder. Solder solvent may be provided on the tape 18 or on the head 30 of the pin 26 to vaporize the flow of solder 42 between the pin head 30 and the tape 18. Soldering can be accomplished by reflowing the solder on pins 26 and tape 18 by any conventional thermal application technique such as warm, steam reflow, infrared or laser furnace. The solder 42 is melted to couple the pin head 30 to the metal layer 20 of the tape 18 by solidification. In order to ensure proper positioning of the pins 26 with respect to the tape 18, the pins 26 can be inserted into fixtures or jigs not shown before soldering, such that the pins 26 are also taped to one another. Is properly aligned with respect to The jig may be a mold itself, for example an integral part of the base, which facilitates mold operation and can be easily inserted and removed.

In the second embodiment, the pin 26a is designed as shown in FIG. 11A. The pin 26a does not require a fixing mechanism. The pinhead 30 is designed to have a diameter that is somewhat less than the diameter of the hole 24 of the interconnect tape 18. Pinhead length 224 is somewhat longer than the thickness of interconnect tape 18. Suitably, the pinhead can extend from about 0.254 mm (0.610 inches) to about 0.51 mm (0.020 inches) above the height of the interconnect tape. The pin 26a includes a first shoulder or collar 39 'that acts as a support for the mutual tape 18. The length of the collar is such that it will be fully inserted into the encapsulant of the plastic pin grid mounting as will be described later. The collar terminates at a second shoulder 228 forming the base of the pin grid array mount.

Fixing pin 26a to interconnect tape 18 is by metallurgical bonding rather than mechanical bonding as in the above embodiment. The pin 26a is first placed in the loading fixture 230 comprising a plurality of holes 60. The aperture 60 can include a shoulder-shaped portion 62 'sized to receive a second shoulder 228 of the pin 26a that firmly supports the pin. The interconnect tape 18 is positioned to rest on the first shoulder 39 'of the pin 26a. Insertion of interconnect tape 18 is facilitated by the need for no mechanical fixation. The tape can be placed on the shoulder without using excessive force. The tape is laid flat on the shoulder without crimping. As discussed below, interconnect tape 18 may be positioned in metal interconnect circuit layer 20 or dielectric layer 22 in contact with shoulder 39 '. A mask 234, such as a stencil or screen, is placed on the interconnect tape 18. The mask includes a series of holes 236. The holes 236 are larger in diameter than the diameter of the pin head 30 and are designed to fit on the pin head so that the interconnect tape rests on the first shoulder 39 'of the pin 26a. The diameter of the mask hole 236 is larger than the diameter of the interconnect hole 24 so that the portion of the interconnect tape 18 adjacent to the pinhead 30 is not covered by the mask 234.

The length 224 of the pinhead 30 is selected such that the pinhead extends at least 0.254 mm (0.010 inches) over the mask, suitably from about 0.254 mm to about 0.51 mm (0.010 inches to 0.020 inches) over the mask.

Solder paste 232 is located on one side of mask 234. The solder face is formed by mixing a metal powder and a liquid to produce a slurry. The liquid has from about 5 volume percent to about 35 volume percent of the slurry. The liquid can be any carrier medium known in the art. Suitable liquids are organic solvents such as medium activated rosin solvents.

The metal powder is selected to have a melting point higher than the mold temperature of the resin for coating, but the dielectric layer of the interconnect tape is low enough that thermal degradation does not occur during soldering. Suitable metal powders have a melting temperature between about 150 ° C. and about 400 ° C. and suitably dissolve in the range of 170 ° C. to about 300 ° C. Suitable metal powders are low melt solders composed of tin and silver, optionally in combination with alloys of tin and lead or other alloying components. Any metal powder that dissolves within the specified range may be within the scope of the present invention.

Solder paste 232 is deposited on one side of mask 234 and painted on the mask by a rubber cleaner. Rubber cleaners usually consist of used rubber cleaned material, but should be suitably high in flexibility. High flexibility is desirable to avoid bending the pin head 30 or moving the pin position.

After applying the solder paste using a rubber cleaner, the solder paste 232 coats the interconnect tape 18 portion not covered by the mask 234. The interconnect tape holes 24 are also filled except for the area occupied by the pin head 30. The mask is then removed and the loading fixation cover 240 is inserted as shown in FIG. 11B. The loading adhesive cover includes a protrusion 242. The protrusion exerts a pressure on the surface of the interconnect tape 18 which tightly adheres the tape to the first shoulder 39 of the pin 26a.

The protrusion 242 ensures that the interconnect tape 18 remains well maintained during the soldering process and remains in contact with the pins 26a. The maximum pressure is achieved by placing a load on the loading fixture cover 240 or by clamping the loading fixture 230 to the loading fixture cover 240 by an external clamp, not shown.

The solder is then dissolved to form a metallurgical bond between the metal interconnect circuit pattern layer 20 of the interconnect tape 18 and the pins 26a. The solder can be dissolved by any automatic or manual process known in the art, for example, warm, infrared or vapor phase solder.

The solder paste may be coated on the conductive layer 20 or the dielectric layer 22 of the interconnect tape, which determines whether cavity up or cavity down mounting is desired, as described below. FIG. 11C shows fillets formed when solder paste is coated on the dielectric layer 22 of the interconnect tape 18 as well as the conductive layer 20. The solder is only coated on the pins 26a and the conductive layer 20. Although the appearance of the fillet is different, the two embodiments form a metallurgical bond between the interconnect tape 18 and the pin 26a.

The fin or optionally a portion of the fin can be coated with a second metal to improve solder wettability. For example, electroplating with gold. In another embodiment, not shown, rather than solder paste, a solder periform, for example a stamped solder ring, may be placed on the shoulder using a pin head for solder alignment.

An assembly with soldered pins and composed of interconnect tape is removed from the solder paint fixture and loaded into the mold 50 as shown in FIG. 3A. In this way, the tape 18 'acts as a carrier for inserting the pin 26' into the mold 50. The mold includes a base component 52 and a cover component 54 which may be composed of a desired material such as steel metal. Base component 52 has a recess 56 having a first donor surface 58. A plurality of holes 60 are formed in the base component 52 extending from the first base surface 58. The aperture 60 can include a cone portion 62 sized to receive the wall 40 'of the pin 26'. Cone wall 40 'is located in cone portion 62 to ensure that pin 26' is properly aligned within mold 50. As shown in FIG.

As shown in FIG. 3B, tape 18 'is supported on base surface 58 of base component 52 by pin 26'. Cover component 54 is clamped into position on base component 52. The cover component 54 includes a projection 64 projecting into a cavity 66 formed between the base component 52 and the cover component 54. The protrusion 64 has a surface 68 that extends outwardly in contact with the tape 18 '. The first projection 64 also includes a central portion 70 extending through the aperture 72 of the tape 18 '. The outer surface 74 of the cover component 54 supports the surface 76 of the base component 52 and closes the mold 50 to open the cavity 66 against the pin 26 'and the tape 18'. Form.

The cavity 66 is then filled with a polymer resin 78 to at least partially surround and support the pins 26 'and the tape 18', as shown in FIG. 3C. Once the polymer resin 78 is loaded, the cavity 66 is filled through a mold passage (not shown) that extends through the base and cover components 52 and 54 in any desired region.

One suitable method of introducing the polymer resin is through the hole in the cover component as shown in FIG. 3A. Introducing the resin from the cover component exerts pressure on the interconnect tape which firmly adheres the tape to the base of the mold fixture. Pressure on the interconnect tape limits the distortion of the tape during the mold.

The polymeric resin is selected from the group consisting of thermosetting and thermoplastic polymeric resins. The thermosetting polymer resin is selected from the group consisting of epoxy, 1-2 polybutadiene, silicone, poly (bismailimide) and polyimide polymer. If desired, each of these polymers can be filled to change the dielectric constant, coefficient of thermal expansion, and the cost of the resulting polymer mixture. The filler may include materials such as, for example, vapor silica, ceramics or quartz. Thermosetting epoxy resins typically have low viscosity and process temperatures of from about 170 ° C to about 300 ° C. The thermoplastic polymer resin can be selected from the group consisting of polyphenylsulfides, polysulfones, polyarylethers, polyamides, polyether ketones, polyethersultones, polyetherimides, polyimides, thermotropics, liquid crystal polymers and fluoropolymers. The thermoplastic polymer resin may or may not be filled with the reasons and materials as described for the thermosetting resin. Thermoplastic resins typically have a high viscosity and a process temperature of about 220 ° C. or more and suitably about 220 ° C. to 400 ° C. One suitable group of thermoplastics is known as liquid crystal polymers which may or may not be filled up to 65% by volume with filler. An example of a liquid crystal polymer is VECTRA, commercially available from Seranese Corporation. Although specific groups of thermoset and thermoplastic polymers have been described, any polymer material capable of coating the fins of the described interconnect tape and pin grid array mountings can be used within the context of the present invention.

In order to practice the present invention, transition casting techniques using polymer materials are typically suitable at pressures less than about G. 9 MPa (1000 pounds per square inch (psi)). The present invention suitably embeds a transfer mold because the lower pressure required in the process reduces the likelihood of damage to the electrical connection during the mold step. However, within the context of the present invention, any other molding technique, such as injection molding, may be used when the high viscosity polymer is injected using a relatively high pressure of about 13.8 MPa (2000 psi) or more. Usually, a thermoplastic resin is cast using the latter magnetic method. However, within the aspect of the present invention, it is possible to transfer mold the thermosetting resin or injection molding the thermoplastic resin. One difference between thermoset polymers and thermoplastic polymers is that thermoset polymers require curing time.

After the polymer resin is filled into the mold cavity 66 and cured or cured, the resulting integrated circuit pin grid array mount 10 is withdrawn from the mold 50. This may be accomplished by a pin that may be operated by means such as hydraulic pressure and extends through a mold (not shown) that pushes the mounting 80 out of the mold 50. As shown in FIG. 3D, the completed mounting 80 can now be trimmed and rubbed to another state if desired.

To prevent the mounting from sticking to the mold, it may be coated with a mold release agent on the mold wall prior to injection of the organic polymer. The specific mold release liquid is selected according to the specific organic polymer used. For example, polyimides may require zinc stearate, fluo polymers or fatty acid template release agents.

The mounting 80 may now have an integrated circuit chip device 82 coupled on the bottom surface 84 of the recess 86. The chip device 82 is then electrically connected to a lead 88 formed by a metal passage extending from the terminal pin 26 'to the recess 86. Such electrical connection can be made by any conventional technique such as, for example, ultrasonic, thermosonic or thermocompression coupling. The electrical connection can be carried out in a TAB process or a conventional wiring bond.

An advantage of the present invention is that the chip 82 and its lead connections can be tested prior to final assembly of the mounting 80. Suitably, the test step may occur prior to sealing of the cover 90 on the mounting 80.

As shown in FIG. 3E, the mounting 80 can now be sealed within the recess 86. The sealing means can incorporate the cover component 90. Cover component 90 may be formed of a material selected from the group consisting of metals, alloys, glass, ceramics, organic polymers, and compounds thereof. The cover component 90 is enclosed into the mounting 80 to cover the recess 86 by any desired means, for example by means of an epoxy adhesive. It is also within the context of the present invention that the recess 86 can be filled with a sealing material, such as a thermoset or thermoplastic organic polymer, as described above.

4A-4F, an integrated circuit pin grid array mounting in which terminal pins 26 are inserted into holes 60 in mold base component 52 'prior to insertion of terminal pins 26 into TAB tape 18. Referring to FIGS. A series of steps are shown for forming 80 '. Suitably, the terminal pin 26 is positioned and secured to the MYLAR or KAPTON carrier 100 by a groove 28 'in the pin head 30 as shown in FIG. 4A. Pin 26 is essentially identical to that shown in FIG. 2 except that it is shown without all the details specified. Such a method of moving a pin is described in US Pat. No. 4,442,938. Since it is still supported by the carrier 100, it is inserted into the hole 60 ′ of the terminal pin 26. The aperture 60 'is sized to support the pin 26 because the carrier 100 is peeled off as shown in Figure 4A. Also within the context of the present invention, the terminal pin 26 can be inserted into the hole 60 'by any desired technique, such as by hand.

Once the terminal pin 26 is positioned at the base component 52 ', the TAB tape 18 is positioned on the pin 26 as shown in FIG. 4B. The tape 18 can be pulled out of the reel to promote the automation of the process. The tape 18 is then adhered onto the pin 26 by a fixture 102 that includes a hole or slot 104 for receiving the pin head 30 '. Fixture 102 may be comprised of any material, such as hard rubber, to avoid damaging tape 18.

Cover component 54 'is then disposed on base component 52' to close mold 50 'as shown in FIG. 3C. In this embodiment, the end of the tape 18 protrudes from the side of the mold 50. The heat sink cup 106 is also embedded in the mold to be coated in the final mounting 80 '. The heat sink cup 106 can have any desired shape and, if desired, have a cooling fin. The heat sink cup 106 is provided with a collar 108 for supporting the tape 18. The collar support can be particularly advantageous during the mold of the polymer resin in the mold. Heated sink cups may also be substantiated in the described embodiments of phosphorus. Next, as shown in a series of steps and FIGS. 3C-3E, the mold 50 'is shown filled with a polymer resin 78' in FIG. 4D, and the mounting 80 'is shown in FIG. 4E. The figure is shown withdrawn from the mold 50 'and the lid 90' seals the chip or device 82 in FIG. 4F.

As shown in FIG. 4F, the mounting 80 'has a tape 18 protruding from the completed mounting 80'. This allows other processing to be done while the tape 18 having the encapsulated pin 26 and the chip 82 'is moved to the tape 18. Also within the context of the present invention, it is possible to trim off the end of the tape 18 protruding from the mounting 80 'before or after the recess 86' in the mounting 80 'is sealed. Also within the context of the present invention, each embodiment described herein may be molded with an interconnect tape extending from the mold if desired.

5A through 5E, a series of steps for constructing a second embodiment of an integrated circuit pin grid array mounting 120 is shown. As shown in FIG. 5D, the completed mount 120 has an integrated circuit device connection recess or cavity 122 that is extended and centered. Lead 124, which is an integral part of interconnect tape 126, extends into connection recess 122.

As shown in FIG. 5A, the mold 128 used to construct the mounting 120 is actually the same as the mold 50 described above, but the basic difference is the protrusion 129 and the mold on the mold base component 130. The protrusion 131 is provided on the cover 132. When the mold 128 is closed as shown in FIG. 5B, the projections 129 and 131 are supported by each other with a tape 126 disposed therebetween. The mold 128 forms a chip connection recess 134 currently centered.

As shown in FIG. 5A, the interconnect tape 126 is essentially the same as the tapes 18 and 18 ′ described above. The pin 26 schematically shows the pin 26 shown in FIG. The difference between the tapes 18 and 18 'is that it provides a lead 124 extending over the hole 72' in a cantilevered fashion. Lead 124, which is an integral part of the metal interconnect circuit pattern 20 ′, is shown to have bumps 125. However, within the context of the present invention, bumps may be formed on the integrated circuit device 82 and leads may be formed without the bumps 125. In addition, the leads can be plated if desired. For example, it may be plated with gold on a nickel barrier layer. Also, any portion of the circuit pattern 20 'may be plated if necessary. Also within the context of the present invention, the tape 126 may be reversed relative to the terminal pin 26 '. In this case, bumps 125 on leads 124 protrude toward base component 130 but do not extend into holes 72 'formed in tape 126. As shown in FIGS. 5A-5E, the leads may protrude into the recess 134 from any side of the mounting 120.

Once the tape 126 and the terminal pins 26 are placed in the mold 128, the polymer resin 78 fills the mold cavity 135 as shown in FIG. 5C. Protrusions 129 and 131 prevent polymer 78 from filling recess 134. Mounting 120 is then withdrawn from mold 128 using any desired means, such as hydraulically actuated pins (not shown).

The mounting 120 has a sealed connection recess 122 after the integrated circuit device is coupled to the device 82. As shown in FIG. 5D, this may be accomplished with lid and base caps 136 and 138, respectively. Caps 136 and 138 may be formed of any desired material, such as the material used to construct lid 90. Caps 136 and 138 seal the holes 140 and 142 in the cavity 122. Caps 136 and 138 may be sealed in mounting 120 by any desired means such as a polymer. It is also within the scope of the present invention to seal the recess 122 by any other means, such as the polymer described above.

A cavity 122 extending through the mounting 120 enables the integrated circuit chip assembly 82 to couple to the TAB tape 126 using the TAB bonding technique. A heated bearing not shown may be inserted through the hole 142 in the mounting 120 to provide a heated support for the chip 82. Then, a further mode of the TAB coupling machine, not shown, may be inserted through the hole 142 to engage the bumped leads to the chip device 82. As shown in FIG. 5E, after the chip 82 is coupled to the lid 124, the caps 136 and 138 are adhesively sealed to bond into the holes 140 and 142 to seal the cavity 122. Let's do it.

6A-6D, a process for forming a third embodiment of integrated circuit pin grid array mounting 150 is shown. The tape 124 'has an integrated circuit device 82' coupled by any means, such as a TAB coupling technique. Next, the tape 124 'has terminal pins 26 fixed as described above and also to the tape and, if desired, terminal pins 26 joined by means such as solder. The tape 124 'acts as a carrier for positioning the terminal pin 26 in the hole 60' of the base component 157.

The mounting 130 is formed in the same mold 52 as the mold 50 used to form the mounting 80 of the first embodiment. The basic difference is that the mold cover 154 has a shape for forming the cavity 156 when supporting the mold base component 157 as shown in FIG. 6B. When the cavity 156 is filled with the organic polymer 78 'as shown in FIG. 6C, the tape 124' including the chip 82 'and the terminal pin 26 are coated in the polymer resin. The mold 152 also enables the tape 124 'to be cut after the tape is placed in the mold 152. The mold base 157 has a cutting edge 158 in contact with the surface 160 of the mold cover 154. After the tape 124 'is normally pulled from the lily into the mold 152, the mold 152 is engaged with the tape 124' and cut as shown in FIG. 6B. Next, the polymer 78 'is wrapped around the edge of the tape 124' and the final mounting 150 completely mixes the tape 78 'and the chip device 82'. Complete coating is important to reduce the chance of atmospheric exposure to tape 78 '. Although a particular cutter technique is shown, within the context of the present invention any means associated with the mold 152 may be used to cut the tape 78 'after the tape 78' has already been placed in the mold 152. Can be. This technique of cutting the TAB tape during the closing of the mold can be applied to any of the other mold configurations described above.

Referring to FIG. 7, there is schematically shown an automated assembly line 170 for inserting an interconnect tape having terminal pins fixed within a mold 172. Tape with fixed pins is wound on the reel 174 schematically shown. The tape layers may be separated from each other on reel 174 by inserts. After the tape is inserted into mold 172, the mold is closed as indicated by dashed line 176 and the mold is filled with polymer. The mold is then opened and the mounting 178 is withdrawn and moved down to another reel, not shown, which is actually identical to the reel 174. It is also within the context of the present invention that the pins can be inserted into the mold and the pins fixed on the tape to cut the tape or to perform any other process described above.

12A-12F, another embodiment of the present invention is shown. The pin 26a is soldered to the interconnect tape 18 as above. If co-up mounting is desired, the dielectric layer 22 of the interconnect tape 18 is in contact with the pin shoulder 39 'as shown in FIG. 11C. If co-down mounting is desired, the electrically conductive layer 20 of the interconnect tape 18 is in contact with the pin shoulder 39 'as shown in FIG. 11C.

Heat sink 106 is secured to interconnect tape 18 as shown in FIG. 12A. The heat sink is a cup-like structure having a flat inner base 244 that houses a semiconductor device, an outer base 245 and a collar 108 to support the interconnect tape 18. The heat sink is formed of any material that is not affected by the temperature required to mold the polymer resin. Suitably the heat sink is an electrical conductor for maintaining electrical contact with the back side of the electronic device. More suitably, the heat sink is copper or aluminum or alloys thereof. Copper and aluminum are suitable because they have excellent thermal conductivity properties and the coefficient of thermal expansion is close to that of the polymer resin. The thermal expansion coefficient of the polymer resin is generally selected from about 150 to 600 × 10 ⁻⁷ in / in / ° C., suitably between 150 and 200 × 10 ⁻⁷ in / in / ° C. The use of copper or aluminum or alloys thereof limits the thermally induced stress between the heat sink and the mold resin.

The heat sink is secured to the interconnect tape as shown in FIG. 12A for the cavity up configuration and FIG. 12B for the cavity down configuration. The collar 108 is secured to the interconnect tape 18. The fixing means 246 may be a polymer adhesive or solder, for example, epoxy. If solder is chosen, a sealing ring, not shown, may be added to the interconnect tape. One embodiment may include using a five layer TAB tape composed of copper, adhesive, polyimide, adhesive and copper layer. The first copper layer is formed in the electrical conduction path while the second copper layer is formed in the sealing ring for soldering to the heat sink. The heat sink can also be plated to increase soldering and corrosion resistance. One possible plating result is a nickel barrier layer under hard gold.

The heat sink is aligned with the interconnect tape hole 23 so that the leads 21 forming the ends of the metal interconnect circuit pattern 20 are supported by the heat sink collar 108. The heatsink collar prevents the lid from moving during subsequent coatings, allowing for more precise coupling to the semiconductor device.

The provision of solder and heat sinks in flexible circuits is known to provide an assembly 18 'having sufficient robustness to be used as a mounting in an unsuitable environment. The semiconductor device is fixed to a heat sink and an electrical connection made between the lead and the bonding position on the semiconductor chip. The lid is fixed to the interconnect tape or the heat sink cavity is filled with a silicone glove.

Increased persistence and ease of adjustment usually involve the coating of the assembly 18 'with a polymer resin as previously described. In the first embodiment shown in FIG. 12C, an interconnect tape 18 ′ with soldered fins 26a and a heat sink 106 coupled to the leads 21 is located in the mold 50. The mold 250 is composed of a base component 252 and a cover component 254. Base component 252 includes a plurality of holes 256 positioned to align with pin 26a soldered to interconnect tape 18 '. The depth of the hole 256 is such that the second shoulder 228 rests on the surface 258 of the base component of the mold. When the mold cavity 260 is filled with the polymer resin, the second shoulder 228 becomes part of the mounting portion for fixing the pin 26a in place. In some embodiments, as shown in FIG. 12C, notches 261 may be included in the collar. The notch is filled with resin during the mold that holds the pin in place.

Cover component 254 includes holes 262 for the introduction of the polymer resin. The hole is suitably positioned in the cover component such that the polymer resin flows into the interconnect tape 18 'with respect to the first shoulder 39' of the pin 26a. The interconnect tape turns out to be flattered when the polymer resin is introduced through the cover component.

Cover component 254 also includes a protrusion 264. Receiving portion 264 prevents the polymer resin from being introduced into the heat sink cavity. The protrusion 264 also serves to position the heat sink in the desired precise position.

The protrusion 264 includes a stepped member 266 that is in close contact with the lid 21 during the mold. The stepped member has a plurality of leads to prevent the resin from being introduced into the leads and also to be in close contact with the collar 108 of the heat sink to facilitate electrical interconnection of the semiconductor chip to the leads. Although FIG. 12 illustrates a mold configuration for co-upward mounting, it is apparent to those skilled in the art that co-down mounting may also be molded with fewer variations on the mold 250. In the cavity downward mounting, the protrusion 264 may be part of the base component and firmly adheres the heat sink to the cover component.

12D illustrates a plastic pin grid array mount 268 fabricated in accordance with this embodiment. The interconnect tape 18 'having the pin 26a fixed thereon is coated in the polymer resin body 270. The heat sink 106 forms part of the outer surface 272 of the mounting. The outer base 247 of the heat sink is exposed to the external environment to facilitate heat removal. The outer base may be somewhat raised as shown in FIG. 12F or coplanar with the surface of the mounting as shown in FIG. Thermally conductive gases or liquids can be introduced across the heat sink surface to increase cooling or fins. The other surface may stick to the heat sink surface to increase heat dissipation.

After the mounting 268 is removed from the mold, it is fixed to the inner base 245 of the heat sink by the die attach 272 of the semiconductor chip 82. If the heat sink 108 is made of a material having a coefficient of thermal expansion (CTE) that is close to that of the chip and an alloy of low expansion iron, nickel, cobalt alloy or copper and tungsten, for example, under the trade name KOVAR, It can be any die attach solder that has been industrially processed, such as silver gold tin or gold silicon common solder. If the heat sink is its thermally highly conductive CTE material, for example a copper alloy, the die attach is typically a conductive polymer resin or a solder base-lead, for example, an epoxy filled with silver.

After the die attach, the semiconductor chip 82 is electrically connected to the leads 21 by wire bonding or a TAB process. In wiring bonding, a thin wire 274, usually made of about 0.025 mm (0.001) in diameter and made of gold, aluminum or copper, connects the bonding position on the semiconductor chip 82 to the lead 21.

In the TAB process, the electrically conductive layer 20 of the interconnect tape 18 'extends beyond the dielectric layer 22 in a cantilever shape. The extension is coupled to the bonding location on the semiconductor chip 82 using standard TAB techniques.

After the chip is electrically connected to the lid 21, the lid 276 seals the enclosure 278 to protect the semiconductor chip 18. The lid is sealed to the mounting 268 by adhesive or solder ring 280. As a solid, as a lid replacement, or in addition to the lid, the enclosure 278 may be filled with a softgel, for example silicone, by a process known as glop topping (not shown). The cavity can also be filled with a cured epoxy.

12D illustrates several advantages of the present invention over the prior art. The pin 26a is firmly fixed in the resin 270 for film. The interconnect tape is supported by the first shoulder 29 ′ and the heat sink collar 108. The lid 21 is supported by a heat sink collar to assist in wiring or coupling. The mounting 268 is on the other hand to limit moisture penetration. Interconnect tape 18 ′ is coated in resin 270 to further protect the tape.

Figure 12E shows another embodiment of the present invention. Prior to insertion into the film mold 250 ', the semiconductor chip 82 is secured to the heat sink and electrically connected as described above. Inclusion 278 is filled with softgel 282. The coating mold 250 'is composed of a base component 252' and a cover component 254 '. A hole 262 is provided in the cover portion to provide a seat for the introduction of the polymer resin. As in this embodiment, the resin is suitably introduced through the cover component 254 'such that the resin adheres to the tape 28' against the first shoulder 39 'of the pin 26a.

This embodiment provides a one piece molded plastic pin grid array mounting as shown in FIG. 12F. Although co-down mounting is shown, it is apparent to those skilled in the art that the film mold 250 'of FIG. 12E can be configured for one-piece co-up mounting.

Referring back to FIG. 12F, the polymer resin body 270 of the one piece mount 284 has a CTE of about 150 to 600 × 10 ⁻⁷ in / in / ° C. The semiconductor chip 82 is usually made of silicon having a CTE of 49 × 10 ⁻⁷ in / in / ° C. When the mounting is in operation, the semiconductor chip is heated due to the electrical resistance in the circuit of the chip. The glowtop acts as a buffer to prevent the higher CTE polymer resin from rubbing on the surface of the lower semiconductor chip during TC, which results in damage to the circuit located on the face of the semiconductor chip 82. If lower CTE polymer resins are used, a buffer system such as glowtopping may not be needed. Another advantage of this embodiment is that the semiconductor device is protected from moisture penetration without the lid sealing.

8A-8D, a series of steps are shown for configuring an integrated circuit pin grid array adapter mount 182. A completed mount 182 is shown in FIG. 8D. The tape 201 has a terminal pin 196 secured thereto and, if desired, is joined by means such as solder 197.

Referring to FIG. 8A, a mold 180 is shown that is suitable for constructing the pin grid array adapter mount 182. As shown in FIG. As in the mold described above, the mold 180 includes a base component 184 and a lid component 186. Base component 184 includes a recess 188 having a base surface 190. A number of holes 192 protrude from base surface 190 into base component 184. The hole 192 may include a cone wall 194 sized to receive the cone portion 195 of the terminal pin 196. Pin 196 is actually identical to pin 26 described above.

8B and 8E, the cover component 186 includes a thin recess 198 suitably sized to be at least the thickness of the metal interconnect pattern layer 200 of the interconnect tape 201. The interconnect pattern layer 200 is actually identical to the metal layer 20 of the interconnect tape 18 described above. Tape 201 is inserted into a mold and secured to pin 196 in accordance with the principles described above. The cover component 186 is configured such that the organic polymer resin 202, which may be selected from the same group as the organic resin 78, positions the tape so as to extend substantially in the same plane as the upper surface 203 of the pattern layer 200. do. The upper surface of the pattern layer 200 is practically free of resin 202 in order to allow the layer 200 to be solder bonded to the semiconductor mounting as described above. This may be accomplished by providing a notch 204 on the inner surface 207 of the mold cover 186 to accommodate the stage 206 of the pin 196. Next, the upper surface 203 may be in contact with the surface 207 of the cavity 208, thereby actually preventing the resin 202 from contacting the surface 203.

As shown in FIG. 8D, the adapter mount 182 is formed within the mold 180 using the processes and concepts described above. For example, pin 196 is inserted through interconnect tape 201 before and after insertion into mold 180. As shown, interconnect tape 201 is an embodiment and any number and configuration of pins may be substantiated if required for a particular application. End 206 of pin 196 may be coupled to layer 200 with solder 197. This step may be before or after the resin 202 is injected into the mold. The polymer resin 202 is then injected into the cavity 208 formed between the cover component 186 and the base component 184. As in the embodiment described above, the tape 201 may be cut to desired size by any means before or after being placed into the mold 180. The mold is then opened and the adapter mount 182 is removed from the mold 180.

An embodiment application of an adapter mount 210 that is identical to the configuration of the mount 182 and configured in accordance with the principles related to this configuration is shown in FIG. Dual-in-line semiconductor mounting 212 with a gull-winged lead 214 requires adaptation for mounting on a circuit board with pinholes. The mounting 212 may first be secured to the adapter mounting 210 by any desired means, such as solder. For example, the lead 214 is soldered on the upper surface 216 of the pattern layer 218. Pin 196 'of adapter mount 210 may then be inserted into a circuit board (not shown).

Another embodiment application to the adapter mount 220 which is identical to the configuration of the mount 182 and configured according to the principles related to this arrangement is shown in FIG. The leadless chip carrier 222 needs adaptability for mounting on a circuit board (not shown) with pin holes. The mounting 222 may first be secured to the adapter mounting 220 by any desired means, such as solder. Pin 196 of adapter mount 222 may then be inserted into a circuit board (not shown).

Although the interconnect tape 18 has been described as a TAB configuration, it is also within the scope of the present invention that the interconnect tape 18 can also be constructed from a metal layer having a dielectric backing such as polyimide glass or epoxy glass.

It is evident that a plastic pin grid array and a process for producing the product produced thereby satisfying the above-mentioned objects, means and advantages are provided according to the present invention. Although the present invention has been described in combination with these embodiments, it will be apparent to those skilled in the art that many replacements, modifications and variations of the technology are possible. Accordingly, all such modifications, changes and substitutions are possible in the scope and spirit of the appended claims.

Claims (86)

In the process steps of forming the integrated circuit pin grid array settings (10, 80, 80 ', 120, 150, 182, 210, 220), (a) interconnect tapes (18, 126, 201) defining the metal interconnect circuit patterns (20, 20', 200, 218). Providing, (b) forming a plurality of holes 24 in the metal circuit patterns 20, 20 ', 200, 218, and (c) a plurality of terminal pins 26, 26', 26 '', 196, 196 '. (196)), (d) placing the interconnect tape (18,126,210) in the mold (50,128,152,172,180), (e) terminal pins (26, 26 ', 26') before or after step (d) Inserting ', 196,196', 196 '' through each of the holes 24, (f) the cavity 66,122,156,208 having the terminal pins 26,26 ', 26' ', 196,196', 196 '' Closing the molds 50, 128, 152, 172, 180 to be formed around the tapes 18, 126, 201, (g) the pins 26, 26 ′, 26 ″, 196, 196 ′, at least partially surrounding and supporting the terminal pins and the tape. 196 '') and tapes (18,126, Molding a polymer resin 16,78,78 ', 78' ', 78' '', 202 around 201, the circuit pattern defining a plurality of leads 21,88,124,214. The tape has a first and a second opposing surface, and by step (e) the terminal pin extends outwardly from the first and second opposing surfaces of the interconnect tape 18,126,201, and the molding step comprises a cavity 66,122,156,208. ) Is filled with the polymer resin. The terminal pins (26, 26 ', 26, 196, 196', 196) of the pin pins (30, 30 ') disposed at one end of the terminal pin, the shoulder 39 and the shoulder around the terminal pin Grooves 28, 28 'between the pin heads, the pin heads having a diameter slightly larger than the holes 24 such that the tapes 18, 126, 201 are mechanically fixed to the grooves when the pin heads are inserted into the holes. Process having a. 3. The method of claim 2, including inserting the terminal pins 26, 26 ', 26, 196, 196', 196 into the hole 24 prior to placing the interconnect tapes 18, 126, 201 into the molds 50, 128, 152, 172, 180. Process characterized in that. 3. A process as claimed in claim 2, comprising the step of placing the interconnect tape 18 into the mold 52 'followed by inserting the terminal pin 26 into the hole 24. . 5. The method of claim 4, wherein the inserting of the terminal pins 26 comprises: supporting the terminal pins 26 in the mold 52 'and supporting the interconnect tape 18 with the terminal pins 26. And the terminal pin is inserted into the hole (24) and mechanically fixed to the interconnect tape by the contacting step. The method of claim 5, further comprising providing the terminal pins 26 supported by the plastic carrier 100, inserting the terminal pins 26 and the carrier 100 into a mold 52 ′, and Removing the carrier (100) from the terminal pin (26) and the mold (52 ') without removing the terminal pin from the mold. 3. The process of claim 2, further comprising coupling the plurality of terminal pins 26, 26 ″, 196, 196 ′, 196 ″ to the metal circuit patterns 20, 20 ′, 200, 218. . 8. The method of claim 7, wherein the step of coupling comprises: providing a solder coating 42 on each of the pin heads 30, 30 'to the terminal pins 26, 26 ", 196, 196', 196 " Providing a solder coating 42 on at least a first surface of the interconnect circuit patterns 20, 20 ′, 200, 218 adjacent each of the plurality of holes 24, and coupling the terminal pins to the metal circuit pattern. The terminal pins 26, 26 ″, 196, 196 ′, 196 and the interconnect circuit patterns 20, 20 ′, 200, 218 to provide the solder coating on the terminal pins and the metal interconnect circuit pattern. And heating. 3. The method of claim 2, wherein providing the interconnect tapes 18, 126, 201 provides the interconnect tapes 18, 126, 201 with the metal circuit patterns 20, 20 ', 200, 218 coupled to the flexible nonmetal substrates 22, 201. Forming a plurality of holes 27 in the non-metallic substrates 22,201 lying on the plurality of holes 25 in the metal circuit patterns 20, 20 ', 200, 218, and the flexible non-metallic substrate. And forming at least one hole (23, 72, 72 ') in (22, 202), the hole being arranged such that the leads (21, 88, 124, 214) extend at least into the hole. 82 ', 82 ", 82 " " 10. The process of claim 9, wherein the polymer resin (16,78,78 ', 78' ', 78' '', 202) is selected from the group consisting of thermosetting and thermoplastic polymer resins. The method of claim 10, wherein the polymer resin (16,78,78 ', 78' ', 78' '', 202) is an epoxy, 1-2 polybutadiene, silicone poly (bismailimide) and polyimide polymer Process characterized in that the thermoplastic polymer resin selected from the group consisting of. The method of claim 10, wherein the polymer resin (16,78,78 ', 78' ', 78' '', 202) is polyphenylsulfide, polysulfone, polyarylether, polyamide, polyether ketone, polyethersulfone And a thermosetting polymer resin selected from the group consisting of polyetherimide and fluoropolymers. 11. The process of claim 10, wherein the molding step is selected from the group consisting of transition moulding and injection molding. 14. The mold (50) of claim 13, wherein the mold (50) includes a base component (52) including a recess (56) having a first donor surface (58), and the cavity (66) surrounding the recess (56). And a cover component 54 in contact with the base component 52 for forming a shape, the first surface having a plurality of holes 60 for receiving the terminal pin 26 ', and the cover component. 54 has a first projection 64 extending into the cavity, the first projection extending through an outer surface 68 for contacting the tape 18 'and an aperture in the tape 72. The molding step with a central surface 70 for forming a mount 80 having tapes and pins 26 inserted only on the tape surface disposed with respect to the outer surface of the first protrusion without polymer resin 78, The mounting is also characterized in that it has a recess (86) suitable for receiving an integrated circuit device (82). 15. The method of claim 14, inserting an integrated circuit device 82 into the recess 86, electrically interconnecting the integrated circuit device 82 to the lead 88, and the recess 86 Sealing the integrated circuit device (82). 16. The method of claim 15, comprising providing a sealing cap 90 for covering the recess 86, and sealing the recess 86 in the cap 90. fair. 14. The mold (128) of claim 13, wherein the mold (128) is in contact with the base component (130) including a recess (134) having a first donor surface and the base component (130) to enclose the cavity (135). A first component surface having a plurality of holes for accommodating the terminal pins 26 ', and the base component 130 is a lead 124 of the tape 18'. ) Has a second protrusion 129 extending into the cavity 135, the cover component having a first protrusion 131 extending into the cavity and in contact with the second protrusion 129. The mold step is characterized by forming a mount (120) having tapes (18 ') and pins (26) inserted in a centrally disposed integrated circuit device connection recess (122) extending through the mount. 18. The method of claim 17, further comprising: forming the lead 124 in a cantilever shape to extend over the hole 72 ', inserting an integrated circuit device 82' 'into the recess 122, Electrically interconnecting said integrated circuit device (82 ") with said lead (72") and sealing said recess (122). 19. The method of claim 18 including providing lids and base seal caps 136, 138 to cover the recess 122, and sealing the recess 122 in the cap 136. Process characterized. 14. The base component 157 of claim 13, wherein the mold 152 includes a base component 157 including a recess having a first donor surface and a base component 157 to form the cavity 156 surrounding the recess. And a cover component 154 in contact with the first donor surface having a plurality of holes for accommodating the terminal pins 26 ", wherein the molding step comprises a polymer resin 78 " Forming a mount (150) having a tape (18) and a pin (26 ") inserted therein. 21. The method of claim 20 including inserting an integrated circuit device 82 '' 'into the recess, and electrically interconnecting the integrated circuit device 82' '' to the lead 124. Characterized in that the process. 14. The mold (180) of claim 13, wherein the mold (180) surrounds the cavity (208) surrounding the recess (188) and the base component (184) including a recess (188) having a first donor surface (190). A cover component 186 in contact with the base component 184 for forming, the first donor surface having a plurality of holes 192 for receiving the terminal pin 196, the cover component The upper surface of the metal interconnect circuit pattern 203 has a plurality of notches 204 on the inner surface 207 to accommodate the end of the terminal pin so that the polymer resin 202 in contact with the inner surface of the cover component Preventing from actually covering the upper surface of the metal interconnect circuit pattern. 23. The process of claim 22 including an additional step of coupling the plurality of terminal pins (196) to the metal circuit pattern (200). 24. The method of claim 23, further comprising providing an electronics mount 212,222 having a plurality of leads 214 and coupling the plurality of leads 214 to leads 216 of the metal interconnect circuit pattern 218. Process comprising the steps of: 25. The process of claim 24, wherein the integrated pin grid array mount is an adapter adapted to connect the electronic mount (212, 222) to a circuit board. In interconnect tapes 18,126,201 suitable for integrated circuit pin grid array mounts 10,80,80 ', 120.150,182,210,220, interconnect tapes 18,126,201 defining metal interconnect circuit patterns 20,20', 200,218. ), A plurality of holes 24 in the metal circuit patterns 20, 20 ′, 200, 218, a plurality of terminal pins 26, 26 ′, 26 ″, 196, 196 ′, 196 ″ and the holes 24, respectively. Terminal pins 26, 26 ′, 26 ″, 196, 196 ′, 196 ′ ″ inserted through the tape, the tape having first and second opposing surfaces, and the circuit pattern having a plurality of leads 21. And 88,124,214, wherein the terminal pins extend outwardly from the first and second opposing surfaces of the interconnect tapes 18, 126, 201, and the holes are sized to the extent that the terminal pins are mechanically fixed to the interconnect tape. Interconnect tape. The terminal pins (26, 26 ", 26, 196, 196 ', 196 ") of the present invention have pin heads (30, 30') disposed at one end of the terminal pins, and a shoulder (39) around the terminal pins. And a groove (28,28 ') between the shoulder and the pin head, the pin head having a diameter slightly larger than the hole in the metal circuit hole 24 such that the interconnect tape is mechanically fixed in the groove. Interconnection tape, characterized in that. 28. The substrate of claim 27 wherein the interconnect tape has the second surface coupled to the flexible nonmetal substrates 22,202, wherein the nonmetal substrates 22,202 are disposed on a plurality of holes 24 in the interconnect tape. And a hole 27 having at least one hole (23, 72, 72 ') in the flexible non-metal substrate (22, 202), the hole having a first portion of the lead (21, 88, 124, 214) An interconnect tape arranged to extend at least into said aperture to be joined to contact said integrated circuit chip (82, 82 ', 82 ", 82' "). 29. The method of claim 28, wherein the apertures 27 of the nonmetallic substrates 22, 202 are slightly less than the apertures 25 of the metallic circuit pattern 20 to reduce the chance of crimping the metallic circuit pattern. Interconnect tape. 29. The interconnect tape of claim 28, wherein the plurality of terminal pins (26, 26 ', 196, 196', 196) are solder (42) bonded to the interconnect tape (18, 126, 201). 29. The integrated circuit pin grid array mounts 10, 80, 120. 150, 210, 220 are molded from polymer resins 78, 78 ', 78 ", 78' ", 202, wherein the mount is partially inserted. Interconnect tape and pins (26, 26 ', 26 ", 196, 196', 196 "). 32. The interconnect tape of claim 31, wherein the polymer resins (78,78 ', 78 ", 78' ", 202) are selected from the group consisting of thermosetting and thermoplastic polymer resins. 33. The method of claim 32, wherein the polymer resins (78,78 ', 78' ', 78' '', 202) are comprised of epoxy, 1-2 polybutadiene, poly (bismailimide), silicone, and polyimide polymer And a thermosetting polymer resin selected from the group consisting of: 1. 33. The method of claim 32, wherein the polymer resins (16,78,78 ', 78' ', 78' '', 202) are polyphenylsulfides, polysulfones, polyethersulfones, polyarylethers, polyamides, polyether ketones And a thermoplastic polymer resin selected from the group consisting of polyetherimide and fluoropolymers. 33. The device of claim 32, further comprising: mountings 80, 80 'having partially extending recesses 86, 86', integrated in the recesses 86, 86 'and electrically connected to the lid 88. Interconnecting tape (82,82 ') and sealing means for sealing said recess. 36. The integrated circuit device connection recess 122, centered therein extending through the mounting 120, at least one hole 23 in the flexible nonmetallic substrate 22, and in the recess 122. An integrated circuit device 82 '' 'disposed therein and sealing means for sealing the recess 122, wherein the hole is such that the first portion of the lid 124 extends into the hole in a cantilever shape. And the first portion of the lead (124) is electrically connected to the integrated circuit device (82 '' '). 32. The interconnect tape of claim 31 comprising an integrated circuit device (82 '' ') electrically connected to the lead and coated in the polymer (78' '). A process for forming integrated circuit pin grid array mounts (268, 284), the method comprising: providing an interconnect tape (18) having first and second opposing surfaces, wherein the plurality of holes (24) are formed in the metal circuit pattern (20). ), Providing a pin head 30 and a plurality of pins 26a defined by the insertion end, electrically connecting the interconnect tape 18 to the pins 26a, a cup-shaped heat sink 106, and fixing the heat sink 106 to the second surface 22 of the interconnect tape 18 opposite the lid 21, wherein the heat sink 106 is fixed to the first surface 22. Defines a silver metal interconnect circuit pattern 20, the circuit pattern defines a number of leads 21, the heat sink is comprised of a color component 108 and a base component, the base component defining a cavity. And has an inner surface 244 and an outer surface 245 for supporting the integrated circuit 82. Characterized in that the process. 39. The process of claim 38, comprising coating said heat sink (106) with a second metal to improve soldering and corrosion resistance. 40. The process according to claim 39, comprising coupling said collar (108) of said heat sink (106) to said second surface (22) of said interconnect tape (18). 41. The process of claim 40, comprising bonding the collar (108) with a thermoplastic or thermoset polymer adhesive. 42. The process of claim 41 wherein the adhesive is an epoxy. 41. The method of claim 40, wherein the second surface 22 of the interconnect tape 18 defines a metal ring and has a solder linear placement end between the heat sink collar 108 and the sealing ring. fair. 44. The process of claim 43, comprising soldering said heat sink (106) to said interconnect tape (18). A process for forming integrated circuit pin grid array mounts (268, 284), comprising: providing an interconnect tape (18) having first and second opposing surfaces, the first circuit having a first diameter in the metal circuit pattern (20). Forming a plurality of holes 24, providing a plurality of pins 26a, inserting an insertion end of the pins into the first adhesive 230, and the holes of the pattern 20 into the circuit. The interconnect tape 18 on the pin head end 30 such that 24 surrounds the pin head and the interconnect tape rests on the first shoulder 39 'of the pin 26a. Positioning and soldering the pins 26a to the interconnect tape 18 using a mask 234 to control the solder 232, wherein the first surface is a metal interconnect circuit. Pattern 20, the circuit pattern is a plurality of leads 21 and the pins It is defined by the pin head 30 end of the second diameter, the insertion end and the collar of the third diameter disposed between them, the collar is limited to the first and second shoulders 39 'and 228, the third Wherein the diameter is greater than the first diameter and the first diameter is larger than the second diameter. 46. The method of claim 45, further comprising: providing the mask with a plurality of holes 236 of the first and second opposing sides and the fourth diameter, wherein the first side of the mask has the interconnect tape 18 Positioning the mask 234 on the pin head 30 so as to rest on the first shoulder 39 'and the pin 26a, by placing the solder 232 as a solder paste on the mask 234; Painting the second side and providing the solder 232 between the second side of the mask 234 so that the solder paste is deposited within the hole 236 of the mask, the fourth Wherein the diameter is larger than the first diameter and smaller than the third diameter. 47. The process according to claim 46, wherein the length (224) of said pin head (30) is greater than the thickness of said interconnect tape (18) and said mask (234). 48. The process according to claim 47, wherein the length (224) of said pin head (30) is at least 0.010 inches greater than the thickness of said interconnect tape (18) and said mask (234). 49. The process of claim 48, wherein the length (224) of the pin head (30) is about 0.010 to 0.020 inches greater than the thickness of the interconnect tape (18) and the mask (234) that are coupled. 50. The process according to claim 49, comprising coating said pin head (30 ") and said first shoulder (39 ') with a second metal or metal alloy to increase solder welding. 47. The process of claim 46, comprising forming the solder (232) as a mixture of low melting temperature metal alloy powder and liquid. 52. The process of claim 51, comprising the step of making the metal alloy powder to be tin / lead or tin / silver and selecting the liquid to be a rosin base solvent. 53. The process of claim 52, wherein the rosin base solvent occupies about 5% to about 35% by volume of the solder paste. 54. The process according to claim 53, wherein said first surface (20) of said interconnect tape (18) is in contact with said first shoulder (39 ') of said pin (26a). 54. The process according to claim 53, wherein said second surface (22) of said interconnect tape (18) is in contact with said first shoulder (39 ') of said pin (26a). A process for forming integrated circuit pin grid array mounts (268, 284), the method comprising: providing an interconnect tape (18) having first and second opposing surfaces (20, 22), said metal circuit pattern (20). Forming a plurality of holes 24, providing a plurality of fins 26a, providing a heating sink 106, said first of said interconnect tape 18 facing said lid 21. Fixing the heat sink 106 to the two surfaces 22, and coating a portion of the interconnect tape 18, the heat sink 106 and the fins 26a in a polymer resin 270. And heating the polymer resin 270 in the mold 252 to form a plastic pin grid array mount 268, 284, the first surface defining a metal interconnect pattern 20. The circuit pattern defines a plurality of leads 21 and the pins define a pin head end 30 and a collar. Is defined by the insertion end and the collar is disposed between the pin head end and the insertion end and is defined by the first and second shoulders 39 'and 228, the heat sink being the base component defining the collar component 108 and the cavity. Wherein said base component has an inner surface (244) and an outer surface (245) for supporting said integrated circuit (82). 59. The process of claim 56, comprising selecting the polymer resin (270) to be thermoset or thermoplastic having a mold temperature higher than about 220 < 0 > C. 59. The process of claim 57, comprising selecting the polymer resin (270) to have a mold temperature of about 220 ° C to about 400 ° C. 59. The process of claim 58, comprising providing a notch (261) in the collar of the pin (26a) to mechanically secure the pin in the polymer resin (270). 60. The method of claim 59, further comprising securing the integrated circuit 82 to the inner surface 244 of the heat sink 106 and electrically connecting the integrated circuit 82 to the lid 21 prior to encapsulation. Process characterized in that. 61. The process of claim 60, comprising coating the cavity of the electrically connected integrated circuit (82) and the heating sink with a compliant polymer (282) prior to encapsulation. 62. The process according to claim 61, wherein said fins (26a) except said interconnect tape (18), said heat sink (106), and said insertion end of said fins are encapsulated in said polymer resin (270). The interconnect tape 18 excluding the lid 21, the heating sink 106 excluding the cavity, the outer base 245 and the inner base 244, and the pin 26a. And wherein said insertion end of ()) is coated in said polymer resin (270). 66. The method of claim 63, wherein the lid component is secured to the inner surface 244 of the heating sink 106, including the lid component 276, and then the lid component is bonded to the molded polymer resin 270. And sealing said integrated circuit in said heating sink cavity (278) by electrically connecting said integrated circuit to said lid (21). A plastic pin grid array mount (268, 284) for housing electronics (82), comprising an interconnect tape (80) having first and second opposing surfaces, a pin head (30 ") end, and an insertion end. A heat sink 106 composed of a plurality of fins 26a, a collar 108 and a base component, connecting means for electrically connecting the pin head 30 " to the interconnect tape 18, and the heat sink Means for securing 106 to the second surface 22 of the interconnect tape 18 opposite the lid 21, the first surface having a plurality of holes 24 and a plurality of leads. A metal interconnect pattern 20 comprising a 21, wherein the base component defines a cavity and includes an inner surface 244 and an outer surface 245 for supporting the integrated circuit 82. Featuring a pin grid array. 67. The pin grid array mounting of claim 65, wherein the means for electrically connecting the pin head (30) to the interconnect tape (18) is soldering. 67. The pin grid array mounting of claim 66, wherein the pin portion in contact with the solder (232) is coated with a second metal to improve solder wettability. 67. The pin grid array mounting of claim 66, wherein said means for securing said heat sink (106) to said interconnect tape (18) is an adhesive bond. 69. The pin grid array mounting of claim 68, wherein said adhesive is epoxy. 67. The pin grid array mounting of claim 66, wherein said second side (22) of said interconnect tape (18) is a metal sealing ring. 71. The pin grid array mounting of claim 70, wherein the means for securing the heat sink (106) to the interconnect tape (18) solders the heat sink collar (108) to the sealing ring. 67. The pin grid array mounting of claim 65, wherein the pin (26a) comprises a collar defined by first and second shoulders (39 'and 228). 73. The pin grid array mounting of claim 72, wherein said first side (20) of said interconnect tape (18) is in contact with said first shoulder (39 '). 73. The pin grid array mounting of claim 72, wherein said second side (22) of said interconnect tape (18) is in contact with said first shoulder (39 '). A pin grid array mounting for housing an integrated circuit 82, the interconnect tape 18 having a first and a second opposing surface, a pin head 30 " An inner surface 244 and an outer surface 245 composed of a plurality of pins 26a, a color component 108 and a base component electrically connected to the first surface 20 of (18) to support the integrated circuit. Heat sink 106 and a polymer resin 270 molded to coat at least a portion of the interconnect tape 18, the heat sink 106 and the fins 26a, and the first The surface defines a metal circuit pattern 20, the metal circuit pattern defining a plurality of holes 24, a plurality of leads 21, and the base component defining a cavity for receiving the integrated circuit 82. The heat sink is fixed to the second surface 22 of the interconnect tape 18. Mounting pin grid array to a gong. 76. The pin grid array mounting of claim 75, wherein said resin is a thermoset or thermoplastic resin having a mold temperature higher than about 220 < 0 > C. 77. The pin grid array mounting of claim 76, wherein the resin has a mold temperature between about 240 ° C and about 400 ° C. 78. The integrated circuit 82 according to claim 77, wherein the integrated circuit 82 is secured to the inner portion 244 of the heat sink 106 and electrically connected to the lid 27 and the compliant polymer 282 is integrated with the inner substrate and integrated. Plastic pin grid array mounting, characterized in that the circuit is coated. 79. The plastic pin grid array mounting of claim 78, wherein the compliant polymer (282) is silicon. 80. The method of claim 79, wherein the polymer resin (270) coats the heat sink (106) except the interconnect tape (18), the outer base portion (245), and the fin (26a) except the insertion end. Plastic pin grid array mounting. 78. The method of claim 77, wherein the polymer resin 270 is formed of the heat sink 106, excluding the interconnect tape 18, the cavity and the inner and outer base portions 244 and 245 except for the lead 21. And pins (26a) except for the insertion end of the plastic pin grid array mounting. 84. The plastic pin grid array assembly of claim 81, wherein a lid component (276) seals the cavity (278) after the integrated circuit (82) is secured to the lead (21) and electrically transferred. 83. The plastic pin grid array mounting of claim 82, wherein the outer base of the heat sink (106) is coplanar with an outer surface of the molded polymer resin (270). 84. The plastic pin grid array mounting of claim 83, wherein the outer surface (245) of the heat sink (106) extends slightly past the surface of the molded polymer resin (270). 76. The device of claim 75, wherein the pins 26a also include color components defined by first and second shoulders 39 'and 228, wherein the first surface 20 of the interconnect tape 18 is formed of a first component. 2 pin grid array mounting characterized in contact with the shoulder. 76. The device of claim 75, wherein the pins 26a also include color components defined by the first and second shoulders 39 'and 228 and wherein the second surface 22 of the interconnect tape 18 is formed of a second component. 1 pin grid array mounting, characterized in contact with the shoulder (39 ').

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