KR960006079B1 - Digital convergence controlling device of projection tv - Google Patents

Abstract

The apparatus controls the convergence of projection TV by giving RGB horizontal and vertical data on the crosses of horizontal and vertical lines, respectively. The system includes the following components. PLL(Phase Locked Loop)(11) receives horizontal/vertical synchronous signals and generates clock needed in the system. Test pattern generator(12A) generates test patterns to match with data. Cursor generator(12B) generates cursors(12b) indicating control points on test pattern(12a). EEPROM(Electrical Erasable and Programmable Read Only Memory: 13) and SRAM(Sequence Random Access Memory: 15) stores horizontal/vertical location data of RGB. Keyboard(17) performs the cursor movement and control. Micro Processor(14) moves data from EEPROM(13) to SRAM(15) and variates the data of SRAM(15) by receiving the input of keyboard(17) and determines enable/disable states of address encoder(12c) by generating control signal, switches data directions by generating screen mute signal. D/A converter(18) converts the data of SRAM(15) into analog signal. Sampling/Holder(19) maintains the output of D/A converter(18) temporarily and generates when needed. Low band pass filter(10) removes the high-band frequency in the output of Sampling/Holder(19). Amp(21) amplifies the output of Low-band pass filter(10) and produces operation current to convergence york(4).

Description

Projection TV's Digital Convergence Control

1 is a conventional analog convergence correction circuit diagram.

2 is a detailed circuit diagram of the correction waveform generator of FIG.

3 is a graph showing the change of raster shape according to each convergence correction signal (A, B, C) according to FIG.

4 is a digital convergence correction circuit according to the present invention.

5 is a test pattern diagram 5 (a) and a cursor shape diagram 5 (b) generated by FIG.

6 is a flowchart of operation of a microprocessor according to the present invention.

7 is a keyboard form according to the present invention.

* Explanation of symbols for main parts of the drawings

4: revision yoke 11: PLL section

12A: Test pattern generator 12B: Cursor generator

12C: Address Encoder 13: E ² PROM

14 microprocessor 15 SRAM

16 switch 17: keyboard

18: D / A converter 19: Sampling / holder

20 low pass filter 21 amplifier

The present invention relates to a digital convergence control device of a projection TV. More specifically, the last scan method using a CRT (Cathode Ray Tube) is a R.G.B. By adjusting the misconvergence by giving each horizontal and vertical position data, it is suitable to enable accurate convergence matching to the edge of the screen.

Convergence adjusting device in a projection TV of the last scan type using a conventional CRT is a correction waveform that generates various correction waveforms for the adjustment of convergence using a horizontal and vertical synchronization (Hsync.) (Vsync.) Signal as shown in FIG. Generator 1, a plurality of variable resistors (VR1-VRm) for adjusting the size of the correction waveform, an op amp (2) for amplifying the correction waveform adjusted by the variable resistors, and a couple for DC (direct current) blocking. Ring condenser (C1), output amplifier (3) that amplifies only pure AC (AC) component through this capacitor, and changes the direction of electrons by changing the direction of electrons by flowing the amplified current to change of magnetic field Convergence Yoke (4) to adjust, constant resistance adjustment variable (VRn) to adjust the entire screen up, down, left and right by adjusting DC bias, feedback resistance (R10) to prevent oscillation, etc. .

The conventional analog convergence correction device having such a configuration generates various waveforms necessary for convergence adjustment by using the horizontal synchronization (Hsync.) Vertical synchronization (Vsync.) In the analog convergence correction waveform generator 1 as shown in FIG. Adjusts the magnitude of the waveform applied from the (VR1-VRm) to the (+) (-) input of the operational amplifier (2), and amplifies the difference between the (+) (-) input of the operational amplifier (2). Adjusting the resistors VR1-VRm causes the output of the op amp 2 to be different.

For example, if the horizontal parabola waveform (Hpara.) Of the analog convergence correction waveform generator (1) is applied to the variable resistor (VR1) and the (+) input side is much larger than the (-) input side waveform, the convergence correction of FIG. As shown in the example of the change of the raster shape according to the signal, the output of the op amp 2 becomes A shape, and the shape of the raster changes as shown on the right side. On the contrary, the negative input of the op amp 2 is greatly adjusted. The output of the op amp 2 is in the form of B, which is in phase opposite to the input, and the change in the raster shape is also in the form of B. As in the case of C, the output of the op amp 2 becomes a sawtooth wave and the change in the raster shape. Similarly appears.

Since the output of the op amp 2 as described above is the DC component is removed through the DC coupling capacitor (C1), only the AC component is applied to the output amplifier (3), the output amplifier (3) amplifies it and the convergence yoke (4) The convergence yoke 4 corrects the misconvergence by changing the current into a change in the magnetic field, thereby changing the direction of electrons in the CRT, and outputting it by the variable resistor VRn. By adjusting the DC bias of the amplifier 3, the entire screen is moved left, right, up and down.

However, in the conventional configuration as described above, since the adjustment waveforms are used in each case, one adjustment variable resistance may not be affected when the adjustment is made. However, the convergence of the unwanted portions is changed during the actual adjustment. It was difficult to adjust and the adjustment was difficult because the number of variable resistor was too large.

Therefore, in the present invention, the RGB horizontal and vertical data is given at the intersection of the horizontal line and the vertical line of the test pattern, and this data is D / A converted and amplified so that a correction current flows through the convergence yoke to the edge of the screen and the convergence is accurate. It is an object of the present invention to provide a digital convergence adjusting device that enables convergence adjustment by changing only the data in the memory if it does not.

Referring to the configuration of the present invention in detail as follows. As shown in FIG. 4, a PLL (Phase Locked Loop) unit 11 that receives a Hsync.Vsync. Signal and generates a clock required for the entire system, and data required for convergence adjustment are specified. A test pattern generator 12A for generating a test pattern 12a and a cursor generator for causing a display point (cursor) 12b indicating an adjustment point to appear on the test pattern as shown in FIG. 12B), an address encoder 12C for generating a data address of an SRAM using the clock of the PLL unit 11, and horizontal and vertical position data of each of RGB given at an intersection point of a horizontal line and a vertical line. Electric Erassable and Programmable Read Only Memory (13) and Sequence Random Access Memory (15), at least for up, down, left, right arrow keys and cursors, RGB The keyboard 17 for moving and adjusting the cursor on the test pattern 12a with the key, the adjustment mode, and the save key, and the data of the Y pyrom 13 are transferred to the SRAM 15 and the keyboard 17 Change the data of the SRAM 15 by receiving the input of), determine the enable / disable of the address encoder 12C, and if necessary, switch the data transmission direction while generating a video mute signal to the video output unit. A microprocessor 14 for receiving the control signal of the microprocessor 14, and a switch 16 for selectively transferring the data of the SRAM 15 to the EPI rom 13 or the DA converter 18, A D / A converter 18 for receiving the data of the SRAM 15 to change the analog signal, and a sampling / holder 19 for temporarily holding the output of the D / A converter 18 and outputting it if necessary. And high frequency at the output of the sampling / holder. The digital convergence adjusting device is composed of a low pass filter (LPF) 20 for removing the signal, and an amplifier 21 for amplifying the output of the low pass filter to flow a current through the convergence yoke 4 to adjust the convergence. .

Referring to the operation and effects of the present invention configured as described above are as follows.

First, when the PLL unit 11 generates a clock required for the system by using a horizontal sync (Hsync.) Vertical sync (Vsync.) Signal, the test pattern generator 12A and the cursor generator 12B use the clock. As shown in FIG. 5 (a) and 5 (b), the test pattern 12a and the cursor 12b are made and added to the image output terminal, and the clock is divided by the address encoder 12c to address the address of the SRAM 15. In this case, the data of the SRAM 15 is outputted to the D / A converter 18 by this address. In this case, the microprocessor 14 is powered on (step S1) as shown in FIG. In the initial operation, a control signal is generated (step S2), the video mute signal is sent to the video output terminal, the address encoder 12C is disabled, and the SRAM 15 is checked for memory data (step S3). At this time, if the data does not exist, the data of the EPIROM 13 is moved to the SRAM 15 (step S4). Enables the address encoder 12C to appear and makes normal operation.

Since the contact point of the switch 16 is connected to the D / A converter 18, it is checked whether or not the convergence adjustment mode (step S6) and the position data of the adjustment point is changed by reading the information on the keyboard 17 in the convergence adjustment mode. (Step S7), which is carried out during the vertical blank period, and this vertical blank period is a considerable time so that the microprocessor 14 can sufficiently move the changed data to the SRAM 15 during the vertical blank period.

If the mode check (step S8) is performed after the adjustment is completed, the microprocessor 14 generates an image mute signal, disables the address encoder 12C, and sets the switch 16 to Y. pyrom 13. The SRAM 15 data is moved to the Y pyrom 13 (step S9), and the data is stored in the Y pyrom 13, and when the saving is completed, the reverse operation is performed to restore the normal state. (Step S10).

In normal operation, the waveform changed from the D / A converter 18 to the analog signal has a momentary value at the sampling / holder 19, and then the vertical and horizontal data of RGB are simultaneously output. Since it contains a high frequency component, it passes through the low pass filter 20 and then amplifies in the amplification stage 21 to flow a current through the convergence yoke 4. The change in the current of the convergence yoke is a change in the magnetic field. The misconvergence is corrected using.

On the other hand, the key operation method in the keyboard form according to the present invention (Fig. 7) presses the "adjust mode" key to enter the convergence adjustment mode and press again to exit the adjustment mode and press the cursor key to adjust the adjustment. Press the left, right, up, or down arrow key to locate the point. If R (Red) is off, press the R (Red) key and press the left arrow to position the RGB correctly. Press to move the convergence to the wrong position, select the RGB key, and press the left, right, up or down arrow key to correct it.

Pressing the left or right arrow key changes the cursor position horizontal data of the SRAM 15 in FIG. 4 and pressing the up or down arrow key changes the cursor position vertical data. After finishing the adjustment, press the "Save" key. The video output is muted for a while, so that the data of the SRAM 15 is stored in the EPI rom 13, and when the memory is finished, the user can return to the original screen by pressing the "Adjustment Mode" key to see a good image quality.

Therefore, the present invention corrects the convergence by giving RGB horizontal and vertical data at the intersection point of the horizontal line and the vertical line, so that the corners of the screen can be precisely adjusted, and the data for correcting some misconvergence can be stored in this pyrom. As a result, the time required for adjustment can be further reduced, and the digital convergence according to the present invention is a useful invention that can enjoy a high-quality screen at any time since the data does not change with the change of temperature.

Claims (1)

A PLL unit 11 for receiving a Hsync.Vsync. Signal and generating a clock required for the entire system, and a test pattern generator for generating a test pattern 12a for specifying data required for convergence adjustment. 12A, a cursor generation unit 12B for causing a cursor 12b indicating an adjustment point to appear on the test pattern 12a, and RGB given at the intersection of the horizontal and vertical lines of the test pattern 12a. Horizontal. EPIROM 13 and SRAM 15 for storing the vertical position data, and at least the up, down, left and right direction keys and cursors, an RGB key, an adjustment mode, and a save key are provided for the cursor of the test pattern 12a. The keyboard 17 for movement and adjustment, the data of the ypyrom 13 is transferred to the SRAM 15 and receives the input of the keyboard 17 to change the data of the SRAM 15 to generate a control signal. A microprocessor 14 which determines the enable / disable of the address encoder 12C and switches the data transmission direction while generating an image mute signal to the video output unit if necessary, and receives a control signal of the microprocessor 14 A switch 16 for selectively transferring data from the RAM 15 to the D / A converter 18 and a D / A converter which receives the data of the SRAM 15 and converts the data into an analog signal. (18) and the output of this D / A converter 18 temporarily A sampling / holder 19 for holding and outputting if necessary, a low pass filter 10 for removing high frequency components from the output of the sampling / holder 19, and amplifying the output of the low pass filter 10 A digital convergence adjusting device for a projection television (TV), comprising: an amplifier (21) for supplying a driving current to the convergence yoke (4).