KR960003259Y1 - Reverse insertion detecting apparatus of semiconductor chip - Google Patents
Reverse insertion detecting apparatus of semiconductor chip Download PDFInfo
- Publication number
- KR960003259Y1 KR960003259Y1 KR92026231U KR920026231U KR960003259Y1 KR 960003259 Y1 KR960003259 Y1 KR 960003259Y1 KR 92026231 U KR92026231 U KR 92026231U KR 920026231 U KR920026231 U KR 920026231U KR 960003259 Y1 KR960003259 Y1 KR 960003259Y1
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- South Korea
- Prior art keywords
- voltage
- output
- input
- semiconductor chip
- reverse insertion
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2879—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2868—Complete testing stations; systems; procedures; software aspects
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
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- Engineering & Computer Science (AREA)
- Environmental & Geological Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
내용 없음.No content.
Description
제1도는 본 고안 역삽 검출 장치의 회로도.1 is a circuit diagram of the present invention reverse insertion detection device.
제2도는 본 고안의 IC 입력측 회로도.2 is an IC input side circuit diagram of the present invention.
제3도는 일반적인 다이오드의 특성도.3 is a characteristic diagram of a general diode.
제4도는 본 고안의 병렬IC 구성도.4 is a parallel IC configuration of the present invention.
제5도는 본 고안 디스플레이부의 다른 실시예를 나타낸 블럭도.5 is a block diagram showing another embodiment of the present invention display unit.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 입력안정회부 2 : 릴레이부1: Input stability part 2: Relay part
3 : 전압 발생부 4 : 비교 및 디스플레이부3: voltage generator 4: comparison and display
5 : 샘플 앤 홀드 6 : A/D 콘버터5: sample and hold 6: A / D converter
본 고안은 ICT(In-Circuit-Tester)에 관한것으로 특히 PCB에 실장된 IC류의 역삽 여부를 용이하게 판단할 수 있는 반도체 칩의 역삽 검출 장치에 관한 것이다.The present invention relates to an in-circuit-tester (ICT), and more particularly, to an inverse insertion detection device for a semiconductor chip capable of easily determining whether or not to reverse insertion of ICs mounted on a PCB.
종래에는 IC의 역삽 여부를 판단하기 위하여 IC의 Vcc 단자에 다이오드 2개가 턴-온 할 수 있는 전압인 1V를 가하고 접지(GND)단자는 접지시켜 양 단자간에 흐르는 전류로 인해 소모되는 전압을 체크하므로 역삽 여부를 판단하였다.Conventionally, in order to determine whether to invert the IC, 1V, which is a voltage that can be turned on by two diodes, is applied to the Vcc terminal of the IC, and the ground (GND) terminal is grounded to check the voltage consumed by the current flowing between both terminals. It was determined whether or not to reverse.
그러나, 종래에는 IC가 여러개 병렬로 접속되어 있을경우 하나만 역삽되어도 전압이 떨어져 역삽 여부를 판단할 수 있으나 어느 IC가 역삽되어 있는지 판단하기가 어려웠다.However, in the related art, when multiple ICs are connected in parallel, even if only one reverse insertion is performed, it is difficult to determine whether the voltage is reversed, but it is difficult to determine which IC is reverse insertion.
본 고안은 이와 같은 종래의 결점을 감안하여 안출한 것으로 병렬로 IC가 연결되는 경우 개개부품의 역삽여부를 용이하게 검출할 수 있는 장치를 제공하는데 그 목적이 있다.The present invention has been made in view of such a conventional drawback, and an object of the present invention is to provide an apparatus capable of easily detecting reverse insertion of individual components when ICs are connected in parallel.
이하에서 이와 같은 목적을 달성하기 위한 본 고안의 실시예를 첨부된 도면에 의하여 상세히 설명하면 다음과 같다.Hereinafter, described in detail by the accompanying drawings an embodiment of the present invention for achieving the above object.
제1도는 본고안의 IC역삽 검출장치의 구성도로 입력 전압을 안정화시켜 출력하는 op 앰프(OP1)(OP2), 트랜지스터(Q1)(Q2), 저항(R1)으로 이루어진 입력안정화부(1)와, 상기 입력안정화부(1)의 출력을 스위칭시키는 릴레이(RY1∼RY3)로 이루어진 릴레이부(2)와, 상기 릴레이부(2)의 출력측에 접속되어 IC(IC1)의 정삽 혹은 역삽에 따른 출력을 발생시키는 전압발생부(3)와, 상기전압발생부(3)의 IC(IC1)출력전압과 기준전압을 비교하여 이의 출력을 모니터에 나타나게 하는 op앰프(OP3), (OP4), 버퍼(B1)로 이루어진 비교 및 디스플레이부(4)를 포함하여서 구성된 것이다.1 is an input stabilization unit composed of an op amp OP 1 (OP 2 ), a transistor Q 1 (Q 2 ), and a resistor R 1 for stabilizing and outputting an input voltage. (1), a relay section 2 composed of relays RY 1 to RY 3 for switching the output of the input stabilization section 1, and an IC (IC 1 ) connected to an output side of the relay section 2; The op amp (OP) for comparing the voltage generator (3) for generating the output according to the interpolation or inverse insertion of the voltage generator (3) and the IC (IC 1 ) output voltage and the reference voltage of the voltage generator (3) to display the output on the monitor 3), (OP 4), it is configured hayeoseo a comparison and display elements (4) made of a buffer (B 1).
이와 같이 구성된 본 고안은 IC(IC1)의 입력은 Vcc와 GND에 대하여 ESD(Electrostatic discharge damage)에 대비하기 위해 직접 연결되어 있지 않고 제2도와 같이 수 KΩ의 저항(R1)과, 다이오드(D1)(D2)를 거쳐 접속되어 있다.According to the present invention configured as described above, the input of the IC (IC 1 ) is not directly connected to Vcc and GND in preparation for electrostatic discharge damage (ESD), and the resistor R 1 of several K 저항 and the diode ( D 1) it is (are connected via a D 2).
여기서, 다이오드의 일반적인 특성을 살펴보면 제3도와 같이 반도체의 니-전압(Knee-Voltage)을 지나면 전류가 흐르기 때문에 Vcc에는 다이오드에 전류가 어느정도 흐를 수 있는 전압(예를들어 0.5V)을 인가하고, 입력에도 역시 0.5V 전압을 인가할 경우 IC(IC1)가 정삽되었다면 제2도와 같이 A점은 입력과 같은 전압이 된다.Here, when looking at the general characteristics of the diode, as shown in FIG. 3, since the current flows through the knee-voltage of the semiconductor, a voltage (for example, 0.5 V) through which the current can flow to the diode is applied to Vcc. If a voltage of 0.5V is also applied to the input, if IC (IC 1 ) is inserted, the point A is the same voltage as the input as shown in FIG.
만일, 역삽인 경우에는 A점의 전압이 저항(R1)과 다이오드(D1)의 턴-온된 저항 성분으로 인해 떨어진다.In the case of inverse insertion, the voltage at point A drops due to the turned-on resistance components of resistor R 1 and diode D 1 .
이와 같은 다이오드의 특성을 이용하여 IC(IC1)가 정삽되었는지 혹은 역삽 되었는지를 판단하기 위하여 공통전압을 사용하여 제4도와 같이 병렬로 접속된 개개의 입력단자를 순차적으로 측정한다.In order to determine whether the IC IC 1 is inserted or reversed by using the characteristics of the diode, the input terminals connected in parallel as shown in FIG. 4 are sequentially measured using a common voltage.
만일 IC(IC1)가 정삽된 경우 입력 안정화부(1)의 op 앰프(op1)로 입력되는 입력전압은 릴레이부(2)의 릴레이(RY)를 통해 IC(IC1)의 Vcc단자에 가해지고 op앰프(op2)의 입력전압은 저항(R1)과 릴레이(RY2)를 통해 IC(IC1)의 입력단에 가해진다.If the IC (IC 1 ) is inserted, the input voltage input to the op amp (op 1 ) of the input stabilization unit 1 is supplied to the Vcc terminal of the IC (IC 1 ) through the relay RY of the relay unit 2. The input voltage of the op amp op 2 is applied to the input terminal of the IC IC 1 through the resistor R 1 and the relay RY 2 .
또한, IC(IC1)의 GND단자는 릴레이 (RY3)를 통해 GND로 된다.In addition, the GND terminal of the IC (IC 1 ) becomes GND through the relay RY 3 .
따라서, 이와 같은 정삽인 경우에는 A의 전압이 입력과 거의 동일하게 되어 op앰프(op4)의 기준전압보다 높게 되므로 op앰프(op4)의 출력측으로는 하이레벨이 발생되어 버퍼(B1)를 통해 pc에서 정삽임을 판별하여 모니터에 정삽 상태임을 디스플레이한다.Therefore, if this is the same jeongsap it is because the voltage of A is substantially equal to the input higher than the reference voltage of the op amp (op 4) to the output of op amplifier (op 4) is at a high level is generated and the buffer (B 1) Determining the correct insertion on the PC through the display to display the insertion status.
그러나, 역삽인 경우에는 A의 전압이 거의 제로(0)에 가깝게 되어 op앰프(op4)의 기준전압보다 작게 되므로 op앰프(op4)의 출력측으로는 로우레벨이 발생되어 버퍼(B1)를 통해 pc에서 역삽입을 판별하여 모니터에 역삽 상태임을 디스플레이한다.However, when the yeoksap a voltage of A is almost close to zero (0) to buffer the output of the op amp (op 4) so to be smaller than the reference voltage of the op amp (op 4) is at a low level is generated (B1) The back insertion is determined by the PC, and the back insertion status is displayed on the monitor.
제5도는 본고안 비교 및 디스플레이부(4)의 다른 실시예를 나타낸 것으로 op앰프(op4) 대신에 샘플 앤 홀드(5)와 A/D 콘버터(6)를 사용하여 op앰프(op3)를 통해 발생한 아날로그 전압을 샘플 앤 홀드하여 A/D 콘버터(6)에서 디지탈 값으로 변환시키면 이를 pc에서 판단하여 모니터에 디스플레이하게 한 것이다.FIG. 5 shows another embodiment of the present comparison and display unit 4 , which uses the sample-and-hold 5 and the A / D converter 6 instead of the op amp op 4 . By converting the analog voltage generated through the A / D converter 6 into a digital value, it is determined by the PC and displayed on the monitor.
이상에서 설명한 바와 같은 본 고안에 의하면 병렬로 연결된 IC의 개개의 입력단자를 공통 전압을 사용하여 순차적으로 측정하기 때문에 IC의 역삽 여부를 정확히 판단할 수 있는 효과가 있다.According to the present invention as described above, since the individual input terminals of the ICs connected in parallel are sequentially measured using a common voltage, it is possible to accurately determine whether the IC is inversely inserted.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR92026231U KR960003259Y1 (en) | 1992-12-23 | 1992-12-23 | Reverse insertion detecting apparatus of semiconductor chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR92026231U KR960003259Y1 (en) | 1992-12-23 | 1992-12-23 | Reverse insertion detecting apparatus of semiconductor chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR940017899U KR940017899U (en) | 1994-07-28 |
| KR960003259Y1 true KR960003259Y1 (en) | 1996-04-19 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR92026231U KR960003259Y1 (en) | 1992-12-23 | 1992-12-23 | Reverse insertion detecting apparatus of semiconductor chip |
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| KR (1) | KR960003259Y1 (en) |
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1992
- 1992-12-23 KR KR92026231U patent/KR960003259Y1/en not_active IP Right Cessation
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| KR940017899U (en) | 1994-07-28 |
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