KR960001616B1 - Tft and its making method - Google Patents
Tft and its making method Download PDFInfo
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- KR960001616B1 KR960001616B1 KR1019920019479A KR920019479A KR960001616B1 KR 960001616 B1 KR960001616 B1 KR 960001616B1 KR 1019920019479 A KR1019920019479 A KR 1019920019479A KR 920019479 A KR920019479 A KR 920019479A KR 960001616 B1 KR960001616 B1 KR 960001616B1
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- gate electrode
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- thin film
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- 238000000034 method Methods 0.000 title claims description 9
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 229910003070 TaOx Inorganic materials 0.000 claims abstract description 9
- 229910016909 AlxOy Inorganic materials 0.000 claims abstract description 6
- 239000004065 semiconductor Substances 0.000 claims abstract description 6
- 241001239379 Calophysus macropterus Species 0.000 claims abstract description 4
- 229910016024 MoTa Inorganic materials 0.000 claims abstract description 4
- 239000010408 film Substances 0.000 claims description 14
- 239000010409 thin film Substances 0.000 claims description 13
- 229910004205 SiNX Inorganic materials 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 2
- 238000007743 anodising Methods 0.000 claims 1
- 230000003647 oxidation Effects 0.000 abstract description 2
- 238000007254 oxidation reaction Methods 0.000 abstract description 2
- 230000009977 dual effect Effects 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000002048 anodisation reaction Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000008570 general process Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02258—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Formation Of Insulating Films (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
제1도는 본 발명에 따른 트랜지스터 단면 구조도.1 is a cross-sectional structure diagram of a transistor according to the present invention.
제2도는 종래 기술에 따른 박막 트랜지스터 단면 구조도이다.2 is a cross-sectional structure of a thin film transistor according to the prior art.
본 발명은 박막 트랜지스터(TFT : Thim Film Transistor)구조 및 그의 형성방법에 관한 것이다.The present invention relates to a thin film transistor (TFT) structure and a method of forming the same.
액정을 사용하여 화상 또는 기호등의 정보를 표시하는 장치는 매트릭스 어레이로 배치된 스위칭 소자들을 갖고 있고 이 소자들에 대해 순차적인 스위칭 동작으로 액정을 통해 화면이 구성되도록 하고 있다.An apparatus for displaying information such as an image or a symbol using a liquid crystal has switching elements arranged in a matrix array, and the screens are configured through the liquid crystal in a sequential switching operation for these elements.
스위칭 소자들은 통상 박막 트랜지스터인 역 배치된 형상의 MOS 트랜지스터이며 기본구성은 금속성 재료로 구성되는 게이트 전극 및 소오스/드레인 전극과, 소오스와 드레인간 연결되고 게이트 전극위에 형성되는 채널층인 반도체층등이다.The switching elements are MOS transistors of a reversely arranged shape, which are usually thin film transistors, and the basic configuration is a gate electrode and a source / drain electrode made of a metallic material, and a semiconductor layer, which is a channel layer connected between the source and the drain and formed on the gate electrode. .
이러한 액티브 매트릭스 액정 표시소자에 사용되는 박막 트랜지스터는 표시장치의 용도 및 크기에 따라 상기한 게이트 전극의 재료를 달리하고 있다. 대형의 액정 표시 장치에 있어서는 게이트 신호의 지연을 저감하기 위해서 저저항의 Aι을 게이트 전극 재료로 사용하고 있으며 Aι은 양극산화가 가능하며 누설전류가 낮은 박막 트랜지스터의 형성이 가능하다.The thin film transistors used in such active matrix liquid crystal display devices have different gate electrode materials depending on the use and size of the display device. In a large liquid crystal display, in order to reduce the delay of a gate signal, low resistance Aι is used as a gate electrode material, and Aι can be anodized and a thin film transistor with low leakage current can be formed.
제2도는 보다 상세히 나타낸 종래의 박막 트랜지스터 단면구조도이다.2 is a cross-sectional view of a conventional thin film transistor shown in more detail.
스위칭 소자는 투명한 유리기판(1) 위에 형성된다. 기판위에는 스퍼터링등의 방법으로 게이트 전극(2)이 형성되고 양극산화에 의한 AιOx(x는 임의의 자연수)막(3)이 그 위에 형성된다. 그 위에 절연층(4), 반도체층(5) 그리고 오믹층(6)이 연속하여 증착되고 패터닝된다.The switching element is formed on the transparent glass substrate 1. On the substrate, a gate electrode 2 is formed by sputtering or the like, and an AιOx (x is an arbitrary natural number) film 3 formed by anodization is formed thereon. The insulating layer 4, the semiconductor layer 5 and the ohmic layer 6 are successively deposited and patterned thereon.
투명전극인 화소전극(7)이 소자에 이격되어 배치되고 이어서 소오스와 드레인 전극(8), (9)이 상기 오믹층(6) 위에 형성되며 드레인 전극(9)이 화소전극(7)과 연결된다.The pixel electrode 7, which is a transparent electrode, is spaced apart from the device, and then source and drain electrodes 8 and 9 are formed on the ohmic layer 6, and the drain electrode 9 is connected to the pixel electrode 7. do.
이러한 구조의 소자에 있어서 언급한 바대로 게이트 전극(2)은 Aι이거나 또는 Ta 등을 선택하여 사용한다. 이때 Aι을 게이트 전극재료로 사용하는 경우에 양극산화막 형성에 의해 누설특성이 양호한 박막 트랜지스터 형성이 가능하나, Aι재료는 후속공정인 열처리등의 공정에서 힐록(hillock)과 같은 문제를 야기시키며, 또한 박막이기 때문에 핀홀이 존재하는 경우 게이트 전극이 공정중에 에칭되는 경우도 있으며 또한 Ta를 게이트 전극으로 사용할 때는 재료특성이나 공정성이 우수하지만 누설전류가 크다는 문제가 있다.As mentioned in the device of such a structure, the gate electrode 2 is selected from Aι or Ta. In this case, when Aι is used as a gate electrode material, a thin film transistor having good leakage characteristics can be formed by forming an anodized film, but Aι material causes problems such as hillock in a subsequent process such as heat treatment. Because of the thin film, when the pinhole is present, the gate electrode may be etched during the process, and when Ta is used as the gate electrode, there is a problem in that the leakage current is high although the material properties and processability are excellent.
본 발명의 목적은 후속공정의 조건에 영향을 받지 않는 게이트 전극의 형성 및 누설전류 특성이 개선된 박막 트랜지스터와 이의 제조방법을 제공하는 것이다.SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor having improved gate electrode formation and leakage current characteristics which are not affected by the conditions of a subsequent process, and a method of manufacturing the same.
상기 목적을 달성하는 2소자 제조방법은 절연성 투명 기판위에 패터닝된 Ta 재질의 게이트 전극의 형성 단계 ; 전면에 Al을 증착하여 양극산화를 실시하므로써 상기 게이트 전극 상에 TaOx 막과 AlxOy 막의 2중 절연층을 형성하는 단계 ; 이 위에 반도체층 및 소오스/드레인 전극 형성단계로 이루어져 소자를 형성함을 특징으로 한다.A two-element manufacturing method for achieving the above object comprises the steps of forming a gate electrode of Ta material patterned on an insulating transparent substrate; Forming a double insulating layer of a TaOx film and an AlxOy film on the gate electrode by depositing Al on the entire surface to perform anodization; A semiconductor layer and a source / drain electrode forming step are formed thereon to form a device.
그리고 상기 방법을 형성된 박막트랜지스터의 구조는 절연성 투명 기판위에 패턴 형성된 게이트 전극과, 이 위에 형성된 TaOx 및 AlxOy 절연층과, 이 위의 반도체층 및 드레인/소오스 전극으로 구성된 것을 특징으로 한다.The structure of the thin film transistor formed by the above method is characterized by comprising a gate electrode patterned on an insulating transparent substrate, a TaOx and AlxOy insulating layer formed thereon, a semiconductor layer and a drain / source electrode thereon.
이하, 본 발명의 보다 상세한 설명을 첨부한 도면을 참조하여 설명한다.Hereinafter, with reference to the accompanying drawings a more detailed description of the present invention will be described.
제1도는 본 발명에서 제공하는 박막 트랜지스터의 단면도로서, 먼저 제조방법을 이하 설명하여 구조를 설명한다.1 is a cross-sectional view of a thin film transistor provided in the present invention. First, a manufacturing method will be described below to explain a structure.
액티브 매트릭스 액정 표시 소자를 위한 스위칭 소자는 투명한 절연성 유리기판(1) 위에 형성된다. 유리 기판 위에는 게이트 전극(11)이 먼저 형성되는데 전기적, 물리적 특성과 공정성이 우수한 Ta 또는 MoTa 재질로 스퍼터링방법으로 기판위에 형성한 후, 소정폭으로 패터닝하므로써 게이트 전극(11)이 형성된다.A switching element for the active matrix liquid crystal display element is formed on the transparent insulating glass substrate 1. The gate electrode 11 is first formed on the glass substrate. The gate electrode 11 is formed on the substrate by a sputtering method of Ta or MoTa material having excellent electrical, physical properties and processability, and then patterned to a predetermined width.
이 상태에서 게이트 절연층을 형성하기 위해서 전면에 Aι막을 증착하고 양극산화를 행하여 제1도에 보인 바와 같이 TaOx인 제1절연층(12)이 게이트 전극(11)을 덮도록 형성하고 동시에 AlxOy 절연막(13)이 형성되도록 한다. TaOx 절연막(12)과 AlxOy 절연막 (13)은 한번의 양극 산화시 동시에 형성된다.In this state, to form a gate insulating layer, an Aι film is deposited on the entire surface and anodized to form the first insulating layer 12, which is TaOx, to cover the gate electrode 11 as shown in FIG. (13) to be formed. The TaOx insulating film 12 and the AlxOy insulating film 13 are simultaneously formed during one anodic oxidation.
다음에 전면에 걸쳐 SiNx막(14)을 도포하여 누설 전류 특성이 우수한 게이트 절연층이 형성되도록 한다. 이하의 공정은 일반적인 공정을 사용하여 TFT를 형성한다.Next, the SiNx film 14 is applied over the entire surface to form a gate insulating layer having excellent leakage current characteristics. The following process forms a TFT using a general process.
본 발명의 게이트 절연층은 양극산화에 의해 형성된 2층의 TaOx, AlxOy막 및 부가적인 SiNx 절연층을 포함하고 이것을 갖는 TFT 소자의 형성으로 누설특성이 양호한 소자를 얻는다.The gate insulating layer of the present invention comprises two TaOx, AlxOy films, and an additional SiNx insulating layer formed by anodization, and a device having good leakage characteristics is obtained by forming a TFT device having the same.
2중의 양극산화막은 후속 공정의 악조건에서도 게이트 전극이 보호되고 본 발명 목적을 달성한다.The double anodization film protects the gate electrode even under the adverse conditions of the subsequent process and achieves the object of the present invention.
또한, 고유전율의 TaOx 막을 사용하여 축적용량을 구성하게 되기 때문에 축적 용량 면적을 감소시킬 수 있어 개구율 향상을 도모할 수 있다.In addition, since the storage capacitance is constituted by using a TaOx film having a high dielectric constant, the storage capacitance area can be reduced, and the aperture ratio can be improved.
그리고 복수의 절연층 사용으로 막질간 단락이 방지될 수 있다.In addition, short circuits between films can be prevented by using a plurality of insulating layers.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920019479A KR960001616B1 (en) | 1992-10-22 | 1992-10-22 | Tft and its making method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920019479A KR960001616B1 (en) | 1992-10-22 | 1992-10-22 | Tft and its making method |
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| Publication Number | Publication Date |
|---|---|
| KR940010309A KR940010309A (en) | 1994-05-26 |
| KR960001616B1 true KR960001616B1 (en) | 1996-02-02 |
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| KR1019920019479A KR960001616B1 (en) | 1992-10-22 | 1992-10-22 | Tft and its making method |
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| KR (1) | KR960001616B1 (en) |
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1992
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| Publication number | Publication date |
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| KR940010309A (en) | 1994-05-26 |
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