KR960001537B1 - Contact-breaking circuit of inputting two direct signals - Google Patents

Contact-breaking circuit of inputting two direct signals Download PDF

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Publication number
KR960001537B1
KR960001537B1 KR1019930019136A KR930019136A KR960001537B1 KR 960001537 B1 KR960001537 B1 KR 960001537B1 KR 1019930019136 A KR1019930019136 A KR 1019930019136A KR 930019136 A KR930019136 A KR 930019136A KR 960001537 B1 KR960001537 B1 KR 960001537B1
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South Korea
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input
transistor
input signal
terminal
collector
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KR1019930019136A
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Korean (ko)
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KR950010359A (en
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김영성
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대우전자주식회사
배순훈
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking

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Abstract

The circuit of the present invention is characterized in that an input signal is applied to a base of a first transistor through a resistance, resistances, and a condenser, respectively, in that the other input signal inputted to the resistance and the input terminal is applied to a base of a second transistor whose emitter and collector are connected to each other, and in that the input signal is outputted to an output terminal through the resistance by connecting the emitter of the second transistor to the collector thereof.

Description

두 직렬 신호 입력 충돌 방지회로Two serial signal input anti-collision circuit

제1도는 본 발명 두 직렬 신호 입력 충돌 방지회로를 나타낸 회로.1 is a circuit diagram illustrating two serial signal input collision avoidance circuits of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

TX1, TX2: 입력단 RX : 출력단TX 1 , TX 2 : Input stage RX: Output stage

R1∼R7: 저항(Resistance), Q1∼Q3: 트랜지스터(Transistor)R 1 to R 7 : Resistance, Q 1 to Q 3 : Transistor

D : 다이오드(Diode) C : 콘덴서(Condenser)D: Diode C: Condenser

본 발명은 두 직렬 입력을 하나의 출력단에서 수신하여 처리하는 것에 관한 것으로서, 두 직렬 입력중 하나의 입력에 우선 순위를 주어 타 입력에 관계없이 출력단으로 우선적으로 선택되어 수신될 수 있도록 하는 두 직렬 입력 충돌 방지회로에 관한 것이다.The present invention relates to receiving and processing two serial inputs at one output stage, wherein two serial inputs are given priority to one of the two serial inputs so that they can be preferentially selected and received at the output stage regardless of the other inputs. It relates to a collision avoidance circuit.

일반적으로 두개 이상의 입력에 하나의 출력단이 연결된 것에 있어서는 두개 이상이 입력이 동시에 이루어질 경우 출력단과 연결되어진 마이콤이나 기타 제어수단에서는 이를 정확하게 수신하지 못하여 수시된 입력을 다른 입력으로 판단하는 마이콤이나 제어수단에 연결되어져 제어하는 장치를 오동작시키는 경우가 있었다.In general, when one or more output terminals are connected to two or more inputs, when two or more inputs are made simultaneously, the microcomputer or other control means connected to the output terminal does not receive this correctly and determines the occasional input as another input. There was a case of malfunctioning the connected device.

특히 마이콤에서 수신하여 처리해야 할 중요한 정보(화재경보, 도난경보 등)인 경우에는 다른 입력으로 인하여 마이콤에서 이를 인식하여 처리하지 못하거나 이를 오판하여 다른 동작으로 구동시킬 경우에는 처한상황에 대처하지 못하는 문제점이 있었다.Especially, in case of important information (fire alarm, burglar alarm, etc.) to be received and processed by the microcomputer, the microcomputer cannot recognize and process it due to other inputs, or if it is misjudged and driven by a different operation, it cannot cope with the situation. There was a problem.

이를 해결하기 위하여 종래에는 우선 순위를 설정하는 구성이 있었으나 이는 별도의 전동 IC에 의해서만 가능했었다.In order to solve this problem, there was conventionally a configuration for setting priorities, but this was possible only by a separate electric IC.

이를 해결하기 위하여 본 발명은 두 입력단으로 입력되는 입력신호중 임의의 한 입력신호에 우선 순위를 부여하여 두 입력신호가 동시에 입력될 때 우선적으로 선택되어 입력될 수 있도록 하는 두 직렬 입력 충돌방지 회로를 제공함에 그 목적이 있다.In order to solve this problem, the present invention provides two serial input collision avoidance circuits that give priority to any one of the input signals input to the two input terminals so that they can be preferentially selected when the two input signals are simultaneously input. Has its purpose.

이하 본 발명을 첨부된 예시도면과 함께 설명한다.Hereinafter, the present invention will be described with reference to the accompanying drawings.

제1도는 본 발명 두 직렬 입력 충돌 방지회로의 회로도로서 입력단(TX1)으로 입력된 입력신호를 저항(R4)을 통하여 트랜지스터(Q2)의 베이스 측에 인가시키는 한펀저항(R2), (R3)과 콘덴서(C)를 통하여 트랜지스터(Q1)의 베이스 측에 각각 인가시키고, 상기 트랜지스터(Q1)의 에미터 측과 콜렉터 측이 연결된 트랜지스터(Q3)의 베이스 측에는 저항(R8) 및 입력단(TX2)으로 입력된 입력신호를 인가시키며, 싱기 트랜지스터(Q2), (Q3)의 콜렉터 측과 에미터 측을 접속시켜 저항(R7)을 통하여 출력단(RX)으로 출력되도록 구성된다.FIG. 1 is a circuit diagram of two series input collision avoidance circuits of the present invention, a Hanfun resistor R 2 for applying an input signal input to an input terminal TX 1 to a base side of a transistor Q 2 through a resistor R 4 ; It is applied to the base side of the transistor Q 1 through (R 3 ) and the capacitor C, respectively, and the resistor R is provided on the base side of the transistor Q 3 to which the emitter side and the collector side of the transistor Q 1 are connected. 8 ) and the input signal input to the input terminal (TX 2 ), and connects the collector side and the emitter side of the singer transistors (Q 2 ), (Q 3 ) to the output terminal (RX) through the resistor (R 7 ) Is configured to be output.

도면중 미 설명된 D는 다이오드(Diode)이고 R1, R2, R6는 저항(Resistance)이다.In the figure, D, which is not described, is a diode and R 1 , R 2 , and R 6 are resistances.

이 같이 구성된 본 발명은 입력단(TX1)으로 입력되는 입력신호가 우선적으로 선택적으로 한 것으로 평상시에는 입력단(TX2)에서 입력신호가 입력되어 출력단(TX)을 통하여 미 도시된 마이콤이나 제어수단에 인가되어 제어동작을 수행한다.In the present invention configured as described above, the input signal input to the input terminal TX 1 is preferentially preferentially. In general, the input signal is input from the input terminal TX 2 to the microcomputer or the control means not shown through the output terminal TX. It is applied to perform the control operation.

즉, 평상시에는 입력단(TX1)에는 "하이"레벨의 입력이 지속적으로 인가되어지고 입력단(TX2)에는 마이콤이나 제어수단에 인가되는 입력신호가 입력된다.That is, normally, the input signal is applied to the microcomputer control means or the input terminal (TX 1) there is the input of the "high" level is applied continuously input terminal (TX 2) is input.

입력단(TX1)을 통해 입력된 "하이"레벨의 입력은 저항(R4)을 통하여 트랜지스터(Q2)의 베이스 측에 "하이"레벨로 인가되어 트랜지스터(Q2)가 "턴오프"상태를 유지하고 저항(R2), (R3)과 콘덴서(C)를 통하여 트랜지스터(Q1)의 베이스 측에 "하이"레벨로 인가되어 트랜지스터(Q1)가 "턴온" 상태를 유지한다.The input of the "high" level input through the input terminal TX 1 is applied at the "high" level to the base side of the transistor Q 2 through the resistor R 4 so that the transistor Q 2 is in the "turn off" state. Is applied to the base side of transistor Q 1 through resistors R 2 , R 3 , and capacitor C to keep transistor Q 1 in a " turned on " state.

이에 따라 트랜지스터(Q1)의 콜렉터 측에 인가중인 전원(Vcc)이 트랜지스터(Q1)와 저항(R5)을 통하여 접지로 흐름과 아울러 트랜지스터(Q1)를 통하여 트랜지스터(Q3)의 콜렉터 측에 유입된다.The collector of the depending being applied to the collector side of the transistor (Q 1) power supply (Vcc) and the transistor (Q 1) and a resistance transistor (Q 3) (R 5) and the ground flow through the well through the transistor (Q 1) Flows into the side.

따라서 입력단(TX1)을 통해 유입되는 입력신호가 트랜지스터(Q3)의 베이스 측을 통하여 에미터 측으로 출력되어 출력단(RX)에 연결된 마이콤이나 제어수단에 인가되므로 마이콤이나 제어수단에 의하여 후단의 동작을 제어할 수 있다.Therefore, since the input signal flowing through the input terminal TX 1 is output to the emitter side through the base side of the transistor Q 3 and applied to the microcomputer or the control means connected to the output terminal RX, the rear stage operation is performed by the microcom or the control means. Can be controlled.

이에 반하여 두 입력단(TX1), (TX2)에서 입력신호가 동시에 입력되는 경우에는 저항(R4)을 통한 입력단(TX1)으로 입력된 입력신호에 의해 트랜지스터(Q2)가 구동하여 트랜지스터(Q2)의 콜렉터에서 출력된 입력단(TX1)으로 입력된 입력신호가 미 도시된 마이콤이나 제어수단에 인가되어 이를 인식한 마이콤이나 제어수단의 제어로 후 단을 구동시키게 된다.On the contrary, when the input signals are simultaneously input at the two input terminals TX 1 and TX 2 , the transistor Q 2 is driven by the input signal inputted to the input terminal TX 1 through the resistor R 4 . An input signal input to the input terminal TX 1 output from the collector of Q 2 is applied to a microcomputer or a control unit (not shown) to drive the rear stage by the control of the microcomputer or the control unit.

이때 트랜지스터(Q1)의 베이스 측에는 저항(R1∼R3)을 통한 전원(Vcc)이 인가되어지나 콘덴서(C)에 충전되었다가 다이오드(D)를 통하여 입력단(TX1)과 동시에 방전됨으로 트랜지스터(Q1)의 베이스 측에는 "로우" 레벨로 인가되어 트랜지스터(Q1)가 "턴오프" 상태를 유지하게 되어 이에 연동하는 트랜지스터(Q3) 역시 구동하지 못함으로 입력단(TX2)으로 입력된 입력신호가 차단되어진다.At this time, the power supply Vcc through the resistors R 1 to R 3 is applied to the base side of the transistor Q 1 , but is charged in the capacitor C and discharged simultaneously with the input terminal TX 1 through the diode D. It is applied to the base side of the transistor Q 1 at a "low" level, so that the transistor Q 1 remains in a "turn-off" state, so that the transistor Q 3 linked thereto is not driven, so it is input to the input terminal TX 2 . The input signal is blocked.

상술한 바와같이 본 발명은 두개의 입력단으로 입력되는 입력신호중 하나의 입력신호에 우선 순위를 주어 출력단으로 우선적으로 선택되어 입력될 수 있도록 함으로써 두 입력신호가 동시에 입력될 때 충돌을 방지할 수 있는 효과가 있다.As described above, the present invention gives priority to one of the input signals input to the two input terminals so that the input signal can be preferentially selected as the output terminal, thereby preventing collision when the two input signals are simultaneously input. There is.

Claims (1)

입력단(TX1)으로 입력된 입력신호를 저항(R4)을 통하여 트랜지스터(Q2)의 베이스 측에 인가시키는 한편 저항(R2), (R3)과 콘덴서(C)를 통하여 트랜지스터(Q1)의 베이스 측에 각각 인가시키고, 상기 트랜지스터(Q1)의 에미터 측과 콜렉터 측이 연결된 트랜지스터(Q3)의 베이스 측에는 저항(R8) 및 입력단(TX2)으로 입력된 입력신호를 인가시키며, 상기 트랜지스터(Q2), (Q3)의 콜렉터 측과 에미터 측을 접속시켜 저항(R7)을 통하여 출력단(RX)으로 출력되도록 구성되어진 것을 특징으로 하는 두 직렬 신호 입력 충돌 방지회로.An input signal input to the input terminal TX 1 is applied to the base side of the transistor Q 2 through the resistor R 4 , while the transistor Q is connected through the resistors R 2 , R 3 , and the capacitor C. each applied to the base side of the first) and the transistor (Q 1) emitter side and the collector side is connected to the transistor (Q 3), the base side of the resistance (R 8) and the input signal input to the input terminal (TX 2) of the And connecting the collector and emitter sides of the transistors Q 2 and Q 3 so as to be output to the output terminal RX through a resistor R 7 . Circuit.
KR1019930019136A 1993-09-21 1993-09-21 Contact-breaking circuit of inputting two direct signals KR960001537B1 (en)

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KR950010359A KR950010359A (en) 1995-04-28
KR960001537B1 true KR960001537B1 (en) 1996-02-01

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100884620B1 (en) * 2007-05-02 2009-02-23 충북대학교 산학협력단 A Signal collision prevention circuit
WO2011014819A3 (en) * 2009-07-31 2011-05-19 Tech M3, Inc. Reduction of particulate emissions from vehicle braking systems

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100884620B1 (en) * 2007-05-02 2009-02-23 충북대학교 산학협력단 A Signal collision prevention circuit
WO2011014819A3 (en) * 2009-07-31 2011-05-19 Tech M3, Inc. Reduction of particulate emissions from vehicle braking systems

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