KR960001092B1 - Clock-counting method for regular time-out interrupt - Google Patents

Abstract

initializing a timer; repeating the above operation until a raising edge by checking the raising edge; checking a value of a CCR when a clock is at the raising edge; in case of a value "0", copying a MCR on the CCR; in case that the CCR is not 0" and a BCR is not "0", checking whether the BCR is "0" or not; in case that the CCR is "1" and the BCR is "0", copying the MCR on the CCR, and the MCR on the BCR; checking whether the CCR is not "1" and whether the BCR is "0"; in case that the BCR is "0", reducing the CCR by 1, copying it on the BCR; and in case that the BCR is not "0", reducing the value of the BCR by 1.

Description

Clock Counting Method for Periodic Timeout Interrupts

1 is a connection diagram of a processor other than a programmable timer.

2 is a schematic diagram of an internal register of a programmable timer.

3 is a flow chart according to the present invention.

* Explanation of symbols for main parts of the drawings

1 processor 2 processor interface circuit

3: programmable timer 4: MCR

5,9: Reserved 6: Counting unit

7: maximum count value 8: CCR

10: current count value 11: BCR

The present invention is directed to a method of counting a clock by a count value to generate a periodic timeout interrupt in a programmable timer.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for a timer to allow a microprocessor to count clocks at intervals of periodic time out interrupts and the occurrence and stop of interrupts by software programmed counts. have.

In the present invention to achieve the above object will be described in more detail based on the accompanying drawings.

First, FIG. 1 shows a connection diagram of a programmable timer and a processor.

As shown in FIG. 1, the programmable timer 3 and the processor 1 are connected via a processor interface circuit 2, and the processor interface circuit 2 provides an interface between the two modules 1,3.

The programmable timer 3 has three registers, as shown in FIG.

Of these three registers, the maximum coefficient register (hereinafter referred to as "MCR") (4) and the current coefficient register (hereinafter referred to as "CCR") (8) are registers accessible by a program.

The MCR 4 can read and write, and the CCR 8 can only read.

The registers accessible by the program consist of 32 bits.

The unit coefficient register (hereinafter referred to as "BCR") 11 cannot be accessed by the program.

The MCR 4 stores the maximum coefficient value 7 and the coefficient unit 6, and the upper four bits 5 are not defined.

The current count value 10 is stored in the CCR 8, and the upper 8 bits 9 are not defined.

The BCR 11 stores the current count value for the counting unit. The value of the maximum coefficient value item 7 of the MCR 4 is V (MCR [23: 0]), the value of the counting unit is V (MCR [27:24]), and the period of the timer input clock is t _clk . V (MCR [23: 0]) and V (MCR [27: 24])

[Equation 1]

[Equation 2]

If the time interval of the periodic timeout interrupt is t, t is

[Equation 3]

Is calculated as

3 is a flowchart illustrating a clock counting method for generating a periodic timeout interrupt in a programmable timer.

When the timer 3 is reset and initialized (step 12), all valid bits of the MCR 4 and the CCR 8 in the internal registers of the timer 3 are zeroed and written to the MCR 4 by a programming interface. When is performed, the counting of the clock starts.

At this time, the timer 3 counts one by one when the clock is rising edge.

It is determined whether the clock is in the rising edge state and waits until the clock reaches the rising edge (step 13).

On the other hand, when the clock reaches the rising edge in the step 13, the CCR [23: 0] (10) checks the value (step 14).

If the value of CCR [23: 0] (10) in step 14 is 0, MCR [23: 0] (7), which is the maximum coefficient value of MCR (4), is copied to CCR [23: 0] (10). Then, the MCR [27: 24] (6) is copied to the BCR 11 and fed back to step 13 (step 15).

Thus step 15 is lobbying to start a new count.

If the CCR [23: 0] (10) is not 0 in the step 14, it is determined whether the CCR [23: 0] (10) is 1 and the BCR (11) is 0 (step 16). .

In this step 16, if the CCR [23: 0] 10 is 1 and the BCR11 is 0, the timer 3 times out, and the MCR [23: 0] (7) Is copied to CCR [23: 0] (10), and MCR [27:24] (6), which is a counting unit, is copied to BCR11 (step 17).

In the step 16, if the CCR [23: 0] (10) is not 1 or if the BCR (11) is not 0, it is determined whether the BCR (11) which is the coefficient value of the current unit is 0 ( Step 18).

If the value of the BCR 11 is 0, the value of the CCR [23: 0] (10) is decreased by 1 and copied to the CCR [23: 0] (10), and the MCR [27:24] (6) Is copied to the BCR and fed back to step 13 (step 19).

If the value of the BCR 11 is not 0 in the step 18, the value of the BCR 11 is decreased by 1, and the feedback is returned to the step 13 while copying the reduced value to the BCR 11 ( Step 20).

In addition, in the above formula (3), the addition of 1 to the right term indicates the coefficient of the coefficient unit by the BCR 11, which is obtained by counting the number obtained by adding 1 to the coefficient unit 6 recorded in the MCR 4. .

Through the BCR 11, the MCR 4 counts the CCR 8 every time the count unit 6 adds 1 to the counting unit 6, and counts the maximum count value 7 of the MCR 4 by the count. Timeout and counting are repeated.

In other words, counting the coefficients in the unit of count through the BCR 11, that is, in order of generating the periodic timeout interrupt in the programmable timer 3, the number of 1 plus the number of programmed units of counting in descending order. After counting the maximum count value through the CCR 8, that is, counting the maximum count value in descending order, the method counts the clock as much as the programmed count value by repeating the two-step counting process.

Performing the counting in the two-step counting process as described above allows the flexibility to adjust the unit for counting the maximum count value by changing the value of the counting unit 6, thereby generating timeout interrupts of various time intervals.

Claims (2)

Initializing the timer 3 to be programmed (12), the step (13) is repeated again until the rising edge is determined by determining whether the rising edge at the time of clock generation, and this step (13) In step 14, if the clock reaches the rising edge, the value of CCR [23: 0] (10) is determined. If the value of CCR [23: 0] (10) is 0 in this step 14, the MCR Copying [23: 0] (7) to CCR [23: 0] (10), copying MCR [27:24] (6) to BCR (11) and fed back to step (13) ( 15) and if the CCR [23: 0] (10) is not 0 in the step 14, if the CCR [23: 0] (10) is 1 and the BCR (11) is not 0, then the BCR ( Step 16 determines whether 11) is 0, and if the CCR [23: 0] (10) is 1 and the BCR 11 is 0 in this step 16, the timer 3 times out. Copy the MCR [23: 0] (7) to the CCR [23: 0] (10) and copy the MCR [27:24] (6) to the BCR (11) to the step (13). Feedback step ( 17) and determining (18) whether the CCR [23: 0] (10) is not 1 or the BCR (11) is 0 in the step (16); If it is 0, the value of CCR [23: 0] (10) is decreased by 1 and copied to CCR [23: 0] (10), and MCR [27:24] (16) is copied to BCR. Returning to step 19, and if the value of BCR 11 is not 0 in step 18, the value of BCR 11 is decreased by 1, and step 20 is returned to step 13 again. Clock counting method for a periodic timeout interrupt, characterized in that it comprises a. 2. The two-step counting process of claim 1, wherein the clock coefficient is counted first in the descending order of the number of programmed counting units plus one. And a clock counting method for the periodic timeout interrupt.