KR950704855A

KR950704855A - ACTIVE IMPEDANCE TERMINATION

Info

Publication number: KR950704855A
Application number: KR1019950701649A
Authority: KR
Inventors: 스테판 더블유. 홉레쉬트
Original assignee: 존 엠. 클락 3세; 내쇼날 세미컨덕터 코포레이션
Priority date: 1993-09-02
Filing date: 1994-07-15
Publication date: 1995-11-20
Also published as: EP0667057A1; WO1995006977A1

Abstract

능동 임피던스 종단 회로는 트랜지스터(12. 13)의 긴 미부쌍으로 구성되어 있는 차동 증폭기단 및 단일 단자 출력(18)을 발생시키는 전류 미러 부하(16, 17)로 구성되어 있다. 일정 전류공급원(14)은 상기 긴 미부쌍의 미부전류를 제공하고 있는 제어 전위(15)에 응답하여 변화될 수 있다. 상기 출력(18)은 반전 입력(13)에 접속됨으로써 100%의 음(-)피드백을 야기시키고 1전압 이득이 비반전 입력 및 상기 출력 사이에 존재한다. 캐패시터(20)는 반전 입력에 연결되어 있으며 바이어스 전위는 비반전 입력에 인가된다. 회로는 캐패시터의 충전이 상기 바이어스 전위와 같게 되도록 작용한다. 이러한 기본회로는 고역 필터 또는 저역 필터로서 작용하도록 구성될수 있다.The active impedance termination circuit consists of a differential amplifier stage consisting of a long tail pair of transistors 12 and 13 and current mirror loads 16 and 17 generating a single terminal output 18. The constant current source 14 can be varied in response to the control potential 15 providing the long tail pair tail current. The output 18 is connected to the inverting input 13 causing 100% negative feedback and there is one voltage gain between the non-inverting input and the output. Capacitor 20 is connected to the inverting input and a bias potential is applied to the non-inverting input. The circuit works so that the charging of the capacitor is equal to the bias potential. This basic circuit can be configured to act as a high pass filter or a low pass filter.

Description

ACTIVE IMPEDANCE TERMINATION

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 회로의 바이폴라 트랜지스터 구성에 대한 회로도이고, 제2도는 본 발명의 회로의 CMOS트랜지스터 구성에 대한 회로도이고, 제3도는 본 발명의 회로를 사용하는 저역 필터에 대한 회로도이고, 제4도는 본 발명의 회로를 사용하는 고역 필터에 대한 회로도이다.1 is a circuit diagram of a bipolar transistor configuration of a circuit of the present invention, FIG. 2 is a circuit diagram of a CMOS transistor configuration of a circuit of the present invention, and FIG. 3 is a circuit diagram of a low pass filter using the circuit of the present invention. 4 is a circuit diagram of a high pass filter using the circuit of the present invention.

Claims

A pair of transistors connected to each other to function differentially as long tail pairs and having inverting and non-inverting inputs, a constant current source connected to supply tail current to the long tail pairs, the long tail pairs to provide a single terminal output. A connected current mirror load, a capacitor connected to the inverting input, and the single terminal output to the inverting input to provide 100% negative feedback and cause a one voltage gain between the noninverting input and the output. Means and a circuit coupled to said non-inverting input, said circuit acting to cause charging on said capacitor to match a bias potential.

2. The active impedance termination circuit of claim 1, wherein the magnitude of the constant tail current is varied as a function of control potential such that the charge or discharge rate of the capacitor can be varied by the control potential.

3. The active impedance termination circuit of claim 2, wherein the transistor is a bipolar junction transistor.

3. The active impedance termination circuit of claim 2, wherein the transistor is a unipolar COMS transistor.

3. The active impedance termination circuit of claim 2, wherein a high pass filter action is achieved at the output terminal by additionally including a signal source applied in series with the capacitor.

3. The active impedance termination circuit of claim 2, wherein a low pass filtering action is achieved at said output terminal by additionally including a signal source applied in series with said bias potential generating source.

※ Note: The disclosure is based on the initial application.