KR950025839A - Gate oxide film formation method of a semiconductor device - Google Patents

Gate oxide film formation method of a semiconductor device Download PDF

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Publication number
KR950025839A
KR950025839A KR1019940002580A KR19940002580A KR950025839A KR 950025839 A KR950025839 A KR 950025839A KR 1019940002580 A KR1019940002580 A KR 1019940002580A KR 19940002580 A KR19940002580 A KR 19940002580A KR 950025839 A KR950025839 A KR 950025839A
Authority
KR
South Korea
Prior art keywords
oxide film
gate oxide
semiconductor device
forming
film formation
Prior art date
Application number
KR1019940002580A
Other languages
Korean (ko)
Other versions
KR970009864B1 (en
Inventor
주문식
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940002580A priority Critical patent/KR970009864B1/en
Publication of KR950025839A publication Critical patent/KR950025839A/en
Application granted granted Critical
Publication of KR970009864B1 publication Critical patent/KR970009864B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor

Abstract

본 발명은 반도체 소자의 게이트 산화막 형성방법에 관한 것으로, 열 산화막을 성장시킨 후 저압의 산소(O2)분 위기에서 열처리(Anneal) 공정을 진행하여 게이트 산화막을 형성하므로써 산화막내의 결함(Defect)을 감소시키고 전기적인 스트레스(Stress)에 대한 소자의 신뢰성을 증시킬수 있도록한 반도체 소자의 게이트 산화막 형성방법에 관해 기술된다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a gate oxide film of a semiconductor device, wherein a thermal oxide film is grown and then subjected to an annealing process at a low pressure oxygen (O 2 ) crisis to form a gate oxide film, thereby forming defects in the oxide film. A method of forming a gate oxide film of a semiconductor device that can reduce and increase the reliability of the device against electrical stress is described.

Description

반도체 소자의 게이트 산화막 형성방법Gate oxide film formation method of a semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 반도체 소자의 게이트 산화막 형성방법을 설명하기 위한 소자의 단면도.1 is a cross-sectional view of a device for explaining a gate oxide film forming method of a semiconductor device according to the present invention.

Claims (2)

반도체 소자의 게이트 산화막 형성방법에 있어서, 실리콘 기판(1)을 O2가스 분위기에서 열처리하여 열산화막을 성장시키는 단계와, 상기 단계로부터 저압의 O2분위기에서 재 열처리 공정을 실시하여 게이트 산화막(2)을 형성시키는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 게이트 산화막 형성방법.In the method for forming a gate oxide film of a semiconductor device, the silicon substrate 1 is heat-treated in an O 2 gas atmosphere to grow a thermal oxide film, and from this step, a re-heat treatment is performed in a low-pressure O 2 atmosphere to perform the gate oxide film 2 Forming a gate oxide film; and forming a gate oxide film. 제1항에 있어서, 상기 재열처리 공정은 100mTorr 내지 1Torr사이에서 실시되는 것을 특징으로 하는 반도체 소자의 산화막 형성방법.The method of claim 1, wherein the reheating process is performed between 100 mTorr and 1 Torr. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940002580A 1994-02-15 1994-02-15 Forming method of gate oxide-film in the semiconductor device KR970009864B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940002580A KR970009864B1 (en) 1994-02-15 1994-02-15 Forming method of gate oxide-film in the semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940002580A KR970009864B1 (en) 1994-02-15 1994-02-15 Forming method of gate oxide-film in the semiconductor device

Publications (2)

Publication Number Publication Date
KR950025839A true KR950025839A (en) 1995-09-18
KR970009864B1 KR970009864B1 (en) 1997-06-18

Family

ID=19377153

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940002580A KR970009864B1 (en) 1994-02-15 1994-02-15 Forming method of gate oxide-film in the semiconductor device

Country Status (1)

Country Link
KR (1) KR970009864B1 (en)

Also Published As

Publication number Publication date
KR970009864B1 (en) 1997-06-18

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