KR950021755A - Thin film transistor - Google Patents

Thin film transistor Download PDF

Info

Publication number
KR950021755A
KR950021755A KR1019930031517A KR930031517A KR950021755A KR 950021755 A KR950021755 A KR 950021755A KR 1019930031517 A KR1019930031517 A KR 1019930031517A KR 930031517 A KR930031517 A KR 930031517A KR 950021755 A KR950021755 A KR 950021755A
Authority
KR
South Korea
Prior art keywords
thin film
film transistor
insulating film
tft
sequentially stacked
Prior art date
Application number
KR1019930031517A
Other languages
Korean (ko)
Other versions
KR970010688B1 (en
Inventor
오의열
Original Assignee
이헌조
엘지전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 엘지전자 주식회사 filed Critical 이헌조
Priority to KR1019930031517A priority Critical patent/KR970010688B1/en
Publication of KR950021755A publication Critical patent/KR950021755A/en
Application granted granted Critical
Publication of KR970010688B1 publication Critical patent/KR970010688B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78642Vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/456Ohmic electrodes on silicon
    • H01L29/458Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)

Abstract

본 발명은 박막트랜지스터 제조방법에 관한 것으로, 종래기술에 의한 박막트랜지스터 제조에 있어서 TFT의 면적감소가 어려워 전체 LCD어레이에서 TFT가 차지하는 면적으로 인해 개구율이 감소하게 되고 제조시의 수율이 떨어지는 문제를 해결하기 위해 기판(1)과, 상기 기판(1)상부에 순차적층된 드레인전극(6)과 채널보호절연막(7)및 소오스전극(5), 상기 드레인전극(6)과 채널보호절연막(7)및 소오스전극(5)이 순차적층되어 이루어진 적층구조의 적어도 일측 경사면을 포함하는 영역에 순차적층되어 형성된 반도체층(4)과 게이트절연막(3)및 게이트전극(2)을 포함하여 이루어지는 것을 특징으로 하는 박막트랜지스터를 제공한다.The present invention relates to a method for manufacturing a thin film transistor, and in the manufacturing of the thin film transistor according to the prior art, it is difficult to reduce the area of the TFT, thereby reducing the aperture ratio due to the area occupied by the TFT in the entire LCD array and solving the problem of low yield during manufacturing The substrate 1, the drain electrode 6 and the channel protective insulating film 7 and the source electrode 5, and the drain electrode 6 and the channel protective insulating film 7 sequentially stacked on the substrate 1 And a semiconductor layer 4, a gate insulating film 3, and a gate electrode 2 that are sequentially stacked in a region including at least one inclined surface of the stacked structure in which the source electrodes 5 are sequentially stacked. It provides a thin film transistor.

본 발명에 의하면, 2장의 마스크를 이용한 사진식각오정에 의해 TFT를 제조할 수 있기 때문에 공정단순화를 통한 수율의 증가를 도모할 수 있으며, 채널을 1㎛~10㎛까지 경사면의 각도에 따라 자유롭게 조정할 수 있으며, 이중 TFT를 구현할 수 있으므로 여유도 향상으로 수율이 향상되고 LCD의 개구율 향상으로 화질도 개선시킬 수 있게 됨에 따라 대면적, 고정세화에 따라 요구되는 높은 수율 및 우수한 화질을 제공할 수 있게 된다.According to the present invention, since the TFT can be manufactured by photolithography using two masks, the yield can be increased through process simplification, and the channel can be freely adjusted according to the angle of the inclined plane from 1 μm to 10 μm. As the dual TFT can be implemented, the yield can be improved by increasing margin and the image quality can be improved by improving the aperture ratio of LCD. Therefore, it is possible to provide high yield and excellent image quality required by large area and high definition. .

Description

박막트랜지스터Thin film transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 제1실시예에 의한 TFT단면구조도.2 is a TFT cross-sectional structure diagram according to the first embodiment of the present invention.

제3도는 본 발명의 제1실시예에 의한 TFT제조방법을 도시한 공정순서도.3 is a process flowchart showing a TFT manufacturing method according to the first embodiment of the present invention.

제4도는 본 발명의 제2실시예에 의한 TFT단면구조도.4 is a TFT cross-sectional structure diagram according to a second embodiment of the present invention.

제5도는 본 발명의 제2실시예에 의한 TFT제조방법을 도시한 공정순서도.5 is a process flowchart showing a TFT manufacturing method according to a second embodiment of the present invention.

제6도는 본 발명의 제2실시예에 의한 TFT평면구조도.6 is a TFT planar structure diagram according to a second embodiment of the present invention.

제7도는 본 발명의 제3실시예에 의한 TFT단면구조.7 is a TFT cross-sectional structure according to a third embodiment of the present invention.

Claims (8)

기판(1)과, 상기 기판(1)상부에 순차적층된 드레인전극(6)과 채널보호절연막(7)및 소오스전극(5), 상기 드레인전극(6)과 채널보호절연막(7)및 소오스전극(5)이 순차적층되어 이루어진 적층구조의 적어도 일측 경사면을 포함하는 영역에 순차적층되어 형성된 반도체층(4)과 게이트절연막(3)및 게이트전극(2)을 포함하여 이루어지는 것을 특징으로 하는 박막트랜지스터.The substrate 1, the drain electrode 6 and the channel protective insulating film 7 and the source electrode 5 sequentially stacked on the substrate 1, the drain electrode 6 and the channel protective insulating film 7 and the source. A thin film comprising a semiconductor layer 4, a gate insulating film 3, and a gate electrode 2 that are sequentially stacked in an area including at least one inclined surface of a stacked structure in which the electrodes 5 are sequentially stacked. transistor. 제1항에 있어서, 상기 채널보호절연막(7)의 측면부의 상기 반도체층(4)영역이 채널영역이 되는 것을 특징으로 하는 박막트랜지스터.The thin film transistor according to claim 1, wherein the semiconductor layer (4) region of the side surface portion of the channel protective insulating film (7) becomes a channel region. 제1항에 있어서, 상기 채널보호절연막(7)은 상압 CVD에 의해 증착된 SiO2로 형성된 것임을 특징으로 하는 박막트랜지스터.2. The thin film transistor according to claim 1, wherein the channel protective insulating film (7) is formed of SiO 2 deposited by atmospheric pressure CVD. 제1항에 있어서, 상기 채널보호절연막(7)의 측면 길이가 1㎛~10㎛인 것을 특징으로 하는 박막트랜지스터.The thin film transistor according to claim 1, wherein the channel protective insulating film (7) has a side length of 1 µm to 10 µm. 제1항에 있어서, 상기 소오스전극(5)과 반도체층(4)및 드레인전극(6)과 반도체층(4)사이에 각각 형성된 불순물반도체층(9)을 더 포함하는 것을 특징으로 하는 박막트랜지스터.2. The thin film transistor according to claim 1, further comprising an impurity semiconductor layer (9) formed between the source electrode (5) and the semiconductor layer (4) and between the drain electrode (6) and the semiconductor layer (4). . 제1항에 있어서, 상기 드레인전극(6)의 일단부가 박막트랜지스터-액정표시장치 어레이의 화소전극(10)과 연결되는 것을 특징으로 하는 박막트랜지스터.The thin film transistor according to claim 1, wherein one end of the drain electrode (6) is connected to the pixel electrode (10) of the thin film transistor array. 제1항에 있어서, 상기 소오스전극(5)및 드레인전극(6)은 Ta 또는 Ta를 포함하는 합금으로 형성하는 것을 특징으로 하는 박막트랜지스터.The thin film transistor according to claim 1, wherein the source electrode (5) and the drain electrode (6) are formed of an alloy containing Ta or Ta. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930031517A 1993-12-30 1993-12-30 Method for manufacturing thin film transistor KR970010688B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930031517A KR970010688B1 (en) 1993-12-30 1993-12-30 Method for manufacturing thin film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930031517A KR970010688B1 (en) 1993-12-30 1993-12-30 Method for manufacturing thin film transistor

Publications (2)

Publication Number Publication Date
KR950021755A true KR950021755A (en) 1995-07-26
KR970010688B1 KR970010688B1 (en) 1997-06-30

Family

ID=19374495

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930031517A KR970010688B1 (en) 1993-12-30 1993-12-30 Method for manufacturing thin film transistor

Country Status (1)

Country Link
KR (1) KR970010688B1 (en)

Also Published As

Publication number Publication date
KR970010688B1 (en) 1997-06-30

Similar Documents

Publication Publication Date Title
US6028653A (en) Active matrix liquid crystal display panel having an improved numerical aperture and display reliability and wiring designing method therefor
US7410818B2 (en) Thin film transistor, liquid crystal display using thin film transistor, and method of manufacturing thin film transistor
KR900002110A (en) Manufacturing method of active matrix panel
KR930017218A (en) Thin Film Field Effect Transistors and Manufacturing Method Thereof
JPH0519830B2 (en)
JP2002246605A (en) Method of manufacturing thin film transistor for liquid crystal display device
KR20000045309A (en) Thin film transistor liquid crystal display element
KR970077612A (en) Thin film transistor, manufacturing method and liquid crystal display device
KR970010774B1 (en) Thin film transistor for liquid crystal device
JPH11112003A (en) Thin film transistor
JPS59108360A (en) Semiconductor device
JPS6151188A (en) Substrate for active matrix display unit
KR950021755A (en) Thin film transistor
JPH06160875A (en) Liquid crystal display device
JPH01302768A (en) Inverse stagger type si-thin film transistor
KR20070002733A (en) Liquid crystal display device and method of lcd
KR940000911A (en) LCD and Manufacturing Method
KR100249191B1 (en) Fabrication method of liquid crystal display device
JPH07131019A (en) Thin film transistor and fabrication thereof
KR100205868B1 (en) A dual gate thin film transistor and a method of fabricating the same
JPH0519831B2 (en)
KR960019779A (en) Thin film transistor for liquid crystal display device and manufacturing method
JPS60119782A (en) Semiconductor device
KR100514764B1 (en) Liquid crystal display device and the method for manufaturing the same
JP2621621B2 (en) Active matrix liquid crystal display

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20120928

Year of fee payment: 16

FPAY Annual fee payment

Payment date: 20130930

Year of fee payment: 17

EXPY Expiration of term