KR950021155A - Micro pattern formation method of semiconductor device - Google Patents

Micro pattern formation method of semiconductor device Download PDF

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Publication number
KR950021155A
KR950021155A KR1019930029268A KR930029268A KR950021155A KR 950021155 A KR950021155 A KR 950021155A KR 1019930029268 A KR1019930029268 A KR 1019930029268A KR 930029268 A KR930029268 A KR 930029268A KR 950021155 A KR950021155 A KR 950021155A
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KR
South Korea
Prior art keywords
semiconductor device
forming
formation method
pattern formation
micro pattern
Prior art date
Application number
KR1019930029268A
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Korean (ko)
Other versions
KR100268798B1 (en
Inventor
원태경
김형수
문승찬
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019930029268A priority Critical patent/KR100268798B1/en
Publication of KR950021155A publication Critical patent/KR950021155A/en
Application granted granted Critical
Publication of KR100268798B1 publication Critical patent/KR100268798B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

본 발명은 반도체 소자의 미세패턴 형성방법에 관한 것으로, 반도체소자의 제조 공정 중에서 실리콘소오스를 주입시키는 실리레이션 공정을 이용하여 O2플라즈마 식각에 의하여 미세패턴을 형성하는 기술로서, 노광공정전에 불용해충을 감광막의 상부에 형성함으로써 회절에 의한 비노광지역의 빛흡수를 감소시켜 실리레이션 콘트라스트를 향상시킨다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a fine pattern of a semiconductor device. The present invention relates to a method of forming a fine pattern by O 2 plasma etching using a silicide process in which silicon source is injected in a semiconductor device manufacturing process. Is formed on the photoresist film to reduce light absorption in the non-exposed areas due to diffraction to improve the silencing contrast.

Description

반도체소자의 미세패턴 형성방법Micro pattern formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도 내지 제5도는 본 발명의 실시예로서 반도체소자의 미세패턴 형성공정을 도시한 단면도.1 to 5 are cross-sectional views showing a fine pattern forming process of a semiconductor device as an embodiment of the present invention.

Claims (3)

웨이퍼 상부에 감광막을 도포한 후, 그 상부에 얇은 불용해층을 형성하는 공정과, 패턴이 형성될 부위의 감광막 표면을 얇게 노광시키는 공정과, 상기 감광막의 비노광지역을 고온 열처리하여 경화시킨 다음, 노광된 부위를 실리레이션된 층으로 형성하는 공정과, 산소 플라즈마를 이용하여 감광막을 건식식각 함으로써 감광막패턴을 형성하는 공정을 포함하는 반도체소자의 미세패턴 형성방법.Applying a photoresist film on top of the wafer, forming a thin insoluble layer thereon; And forming a photoresist pattern by dry etching the photoresist using an oxygen plasma. 제1항에 있어서, 상기 불용해층은 마스크를 통해 비노광지역으로 회절되는 빛이 흡수되도록 하는 PAC(photo active compound)농도가 높은 층인 것을 특징으로 하는 반도체 소자의 미세패턴 형성방법.The method of claim 1, wherein the insoluble layer is a layer having a high photo active compound (PAC) concentration to absorb light diffracted into a non-exposed area through a mask. 제2항에 있어서, 상기 불용해층은 감광막을 알칼리성 용액으로 표면처리하여 형성하는 것을 특징으로 하는 반도체 소자의 미세패턴 형성방법.3. The method of claim 2, wherein the insoluble layer is formed by surface treatment of the photosensitive film with an alkaline solution. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930029268A 1993-12-23 1993-12-23 Micro pattern formation method of semiconductor device KR100268798B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930029268A KR100268798B1 (en) 1993-12-23 1993-12-23 Micro pattern formation method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930029268A KR100268798B1 (en) 1993-12-23 1993-12-23 Micro pattern formation method of semiconductor device

Publications (2)

Publication Number Publication Date
KR950021155A true KR950021155A (en) 1995-07-26
KR100268798B1 KR100268798B1 (en) 2000-11-01

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ID=19372311

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930029268A KR100268798B1 (en) 1993-12-23 1993-12-23 Micro pattern formation method of semiconductor device

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KR (1) KR100268798B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100383636B1 (en) * 2000-05-31 2003-05-16 삼성전자주식회사 Method for forming pattern in semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100383636B1 (en) * 2000-05-31 2003-05-16 삼성전자주식회사 Method for forming pattern in semiconductor device

Also Published As

Publication number Publication date
KR100268798B1 (en) 2000-11-01

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