KR950014114B1 - Manufacturing method of insulating layer for isolation - Google Patents

Manufacturing method of insulating layer for isolation Download PDF

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KR950014114B1
KR950014114B1 KR1019920020455A KR920020455A KR950014114B1 KR 950014114 B1 KR950014114 B1 KR 950014114B1 KR 1019920020455 A KR1019920020455 A KR 1019920020455A KR 920020455 A KR920020455 A KR 920020455A KR 950014114 B1 KR950014114 B1 KR 950014114B1
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film
layer
forming
bpsg
trench
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KR1019920020455A
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KR940012574A (en
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이병창
기영종
박상훈
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현대전자산업주식회사
김주용
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

The method for forming insulating layer for element separation comprises the steps of forming a trench over a silicon substrate and depositing a thermal oxide layer, a nitride layer and a BPSG layer over the whole surface; making the BPSG layer flat, ion-implanting a silicon germanium atom and forming an amorphous layer over the surface of the BPSG; removing the amorphous layer and the BPSG layer and forming a TEOS layer over the upper portion of the whole structure; and etching back the TEOS layer until the upper portion of the nitride layer is exposed, filling the trench with the thermal oxide layer, nitride layer, BPSG layer, amorphous layer and TEOS layer and forming an insulating layer for element separation.

Description

소자분리용 절연막 형성방법Method of forming insulating film for device isolation

제1a도 내지 제1c도는 종래기술에 의해 소자분리용 절연막을 형성하는 단계를 도시한 단면도.1A to 1C are cross-sectional views showing a step of forming an insulating film for device isolation by the prior art.

제2a도 내지 제2e도는 본 발명에 의해 소자분리용 절연막을 형성하는 단계를 도시한 단면도.2A to 2E are cross-sectional views showing steps of forming an insulating film for device isolation in accordance with the present invention.

* 도면의 주요 부분에 내한 부호의 설명* Explanation of cold protection symbols in the main parts of the drawings

1 : 실리콘 기판 2 : 트렌치(trench)1: Silicon Substrate 2: Trench

3 : 열산화막 4,7 : BPSG막3: thermal oxide film 4,7 BPSG film

5,10 : 소자분리용 절연막 6 : 질화막5,10 insulating film for device isolation 6: nitride film

8 : 비정질막 9 : TEOS막.8: amorphous film 9: TEOS film.

본 발명은 고집적 반도체 소자의 소자분리용 절연막 형성방법에 관한것으로 특히 트렌치를 이용한 소자분리용 절연막 제조시 열산화막/질화막/BPSG막 비정질막/TEOS막을 적층하여 소자분리기능을 증가시키는 소자분리용 절연막 형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a device isolation insulating film for a highly integrated semiconductor device. In particular, in the fabrication of a device isolation insulating film using a trench, an insulation layer for increasing device isolation by stacking a thermal oxide film / nitride film / BPSG film amorphous film / TEOS film is used. It relates to a formation method.

일반적으로 소자와 소자를 격리시키기 위하여 소자분리용 절연막을 형성하는데 그 예로, LOCOS공정방법에 의해 소자분리용 절연막을 형성하는 방법과 트렌치형 소자분리용 절연막을 형성하는 방법이 있다.In general, an isolation layer for forming an element isolation is formed to isolate an element from an element, and examples thereof include a method of forming an isolation layer for a device isolation by a LOCOS process method and a method for forming an insulating layer for isolation of a trench type device.

종래기술에 의해 트렌치형 소자분리용 절연막을 형성하는 공정단계를 제1a도 내지 제1c도를 참조하여 설명하기로 하겠다.A process step of forming a trench type isolation layer according to the prior art will be described with reference to FIGS. 1A to 1C.

제1a도는 실리콘기판(1)에 소정깊이의 트렌치(2)을 형성한 단면도이다.FIG. 1A is a cross-sectional view of the trench 2 having a predetermined depth formed on the silicon substrate 1.

제1b도는 전면에 걸쳐 열산화막(3)을 형성하고, BPSG막(4)을 트렌치(2)가 완전히 매립되도록 플로우 공정으로 평탄하게 도포한 단면도이다.FIG. 1B is a cross-sectional view in which the thermal oxide film 3 is formed over the entire surface, and the BPSG film 4 is flatly applied in a flow process so that the trench 2 is completely embedded.

제1c도는 상기 BPSG막(4)을 HF식각법으로 에치백하되, 상기 열산화막(3) 상부면이 노출되기까지 식각하여 BPSG막(4)이 트렌치(2)에 채워진 소자분리용 절연막(5)을 형성한 단면도이다.FIG. 1C illustrates that the BPSG film 4 is etched back by HF etching, but the etching process is performed until the upper surface of the thermal oxide film 3 is exposed so that the BPSG film 4 is filled in the trench 2. ) Is a cross-sectional view.

그러나 BPSG막이 노출되도록 형성된 소자분리용 절연막은 이후의 열공정에서 BPSG막에 포함된 불순물인 붕소(boron)와 인(phosphorus)이 외부로 확산되어 소자특성에 나쁜 영향을 주게 된다.However, in the device isolation insulating layer formed to expose the BPSG film, boron and phosphorus, which are impurities included in the BPSG film, are diffused to the outside in a subsequent thermal process, thereby adversely affecting device characteristics.

따라서, 본 발명은 상기의 문제점을 해결하기 위하여 BPSG막 상부면에 단차피복성이 뛰어난 TEOS막을 형성하여 BPSG막으로부터 불순물 확산을 방지하는 소자분리용 절연막을 형성하는 방법을 제공하는데 그목적이 있다.Accordingly, an object of the present invention is to provide a method for forming a device isolation insulating film for preventing impurity diffusion from the BPSG film by forming a TEOS film having excellent step coverage on the upper surface of the BPSG film to solve the above problems.

이하, 첨부된 도면을 참조하여 본 발명을 상제히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

제2a도 내지 제2e도는 본 발명에 의해 소자분리용 절연막을 제조하는 단계를 도시한 단면도이다.2A to 2E are cross-sectional views showing steps of manufacturing an insulating film for device isolation according to the present invention.

제2a도는 실리콘 기판(1)에 소정깊이의 트렌치(2)를 형성한 단면도이다.FIG. 2A is a cross-sectional view of the trench 2 having a predetermined depth formed on the silicon substrate 1.

제2b도는 실리콘 기판(1) 상부에 열산화막(3)을 100-1000Å의 두께로 형성하고, 그 상부에 질화막(6)을 500-1500Å의 두께로 형성하고, 질화막(6) 상부에 BPSG막(7)을 500-2000Å의 두께로 순차적으로 형성한 단면적이다.2B shows a thermal oxide film 3 formed on the silicon substrate 1 to a thickness of 100-1000 kPa, a nitride film 6 formed thereon to a thickness of 500-1500 kPa, and a BPSG film formed on the nitride film 6. (7) is a cross-sectional area formed sequentially with a thickness of 500-2000 mm 3.

제2c도는 900-1000℃의 온도에서 플로우 공정을 실시하여 BPSG막(7)을 평탄화시킨 다음, 실리콘 또는 게르마늄 원자를 상기 BPSG막(7)으로 이온주입시켜서 비정질막(8)을 형성한 단면도이다.2C is a cross-sectional view of forming an amorphous film 8 by performing a flow process at a temperature of 900-1000 ° C. to planarize the BPSG film 7, and then implanting silicon or germanium atoms into the BPSG film 7. .

제2d도는 HF식각법으로 트렌치(2) 외부에 있는 비정질체(8)과 BPSG막(7)을 제거한 다음, 전체적으로 단차 피복성이 좋은 TEOS막(9)을 두껍게 증착한 단면도이다.FIG. 2D is a cross-sectional view in which the amorphous body 8 and the BPSG film 7 outside the trench 2 are removed by HF etching, and then the TEOS film 9 having a high step coverage overall is deposited thickly.

제2e도는 HF식각법으로 TEOS법(9)을 에치백하되, 질화막(6) 상부면이 노출되기까지 식각하여 트렌치(2)에 열산화막(3), 질화막(6), BPSG막(7), 비정질막(8) 및 TEOS막(9)으로 채워서 소자분리용 절연막(10)을 형성한 단면도이다.FIG. 2E shows the TEOS method (9) etched back by HF etching, but etching until the upper surface of the nitride film (6) is exposed to the thermal oxide film (3), nitride film (6), BPSG film (7) in the trench (2). And an insulating film 10 for element isolation by filling with the amorphous film 8 and the TEOS film 9.

상기한 본 발명에 의하면 트렌치에 채워진 BPSG막이 비정질막, TEOS막에 의해 덮혀지게 되므로써 BPSG막으로 부터 불순물이 외부확산 되는 것을 방지하여 소자의 신뢰성을 향상시키게 된다.According to the present invention described above, the BPSG film filled in the trench is covered by the amorphous film and the TEOS film, thereby preventing the diffusion of impurities from the BPSG film to improve the reliability of the device.

또한, BPSG막에 실리콘 또는 게르마늄 원자를 이온주입하여 비정질막을 형성함으로써 트렌치에는 열산화막, 질화막, BPSG막, 비정질막 및 TEOS막의 5중 구조로된 소자분리용 절연막은 절연효과가 극대화 된다.In addition, by forming an amorphous film by ion implanting silicon or germanium atoms into the BPSG film, the insulating film for device isolation having a five-layer structure of a thermal oxide film, a nitride film, a BPSG film, an amorphous film, and a TEOS film in a trench maximizes an insulating effect.

Claims (4)

반도체 소자의 소자분리용 절연막 형성방법에 있어서, 실리콘 기판에 트렌치를 형성하고, 전면에 걸쳐 열산화막, 질화막 및 BPSG막을 각각 소정두께로 적층하는 단계와, 플로우 공정으로 상기 BPSG막을 평탄화 시킨다음, 실리콘 게르마늄 원자를 이온주입하여 BPSG막 표면에 비정질막을 형성하는 단계와, 트렌치 외부에 있는 상기 비정질막과 BPSG막을 제거한 다음, 전체구조 상부에 TEOS막을 형성하는 단계와, 상기TEOS막을 에치백하되, 질화막 상부면이 노출되기까지 식각하여 트렌치에 열산화막, 절화막, BPSG막, 비정질막 및 TEOS막에 채워서 소자분리용 절연막을 형성하는 단계로 이루어지는 것을 특징으로 하는 소자분리용 절연막 형성방법.A method of forming an insulating film for isolation of a semiconductor device, the method comprising: forming a trench in a silicon substrate, stacking a thermal oxide film, a nitride film, and a BPSG film on the silicon substrate to a predetermined thickness, and planarizing the BPSG film by a flow process; Forming an amorphous film on the surface of the BPSG film by ion implantation of germanium atoms, removing the amorphous film and the BPSG film outside the trench, and forming a TEOS film over the entire structure, and etching back the TEOS film, Forming an insulating film for device isolation by etching the surface until the surface is exposed and filling the thermal oxide film, the cut film, the BPSG film, the amorphous film, and the TEOS film in the trench. 제1항에 있어서, 상기 열산화막은 100-1000Å의 두께로 형성하는 것을 특징으로 하는 소자분리용 절연막 형성방법.The method of claim 1, wherein the thermal oxide film is formed to a thickness of 100-1000 kPa. 제1항에 있어서, 상기 질화막은 500-1500Å의 두께로 형성하는 것을 특징으로 하는 소자분리용 절연막 형성방법.The method of claim 1, wherein the nitride film is formed to a thickness of 500-1500 kV. 제1항에 있어서, 상기 BPSG막은 500-2000Å의 두께로 형성하는 것을 특징으로 하는 소자분리용 절연막 형성방법.The method of claim 1, wherein the BPSG film is formed to a thickness of 500-2000 GPa.
KR1019920020455A 1992-11-02 1992-11-02 Manufacturing method of insulating layer for isolation KR950014114B1 (en)

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KR950014114B1 true KR950014114B1 (en) 1995-11-21

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Publication number Priority date Publication date Assignee Title
KR100492790B1 (en) * 1997-06-28 2005-08-24 주식회사 하이닉스반도체 Device isolation insulating film formation method of semiconductor device
KR19990074005A (en) * 1998-03-05 1999-10-05 윤종용 Trench Device Isolation Method to Prevent Impurity Diffusion from Well Area
KR100315452B1 (en) * 1999-03-25 2001-11-28 황인길 Shallow trench manufacturing method for isolating semiconductor devices
KR100425998B1 (en) * 2001-12-27 2004-04-06 동부전자 주식회사 shallow trench isolation forming method of silicon substrate

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