KR950012224A - Communication line failure prevention circuit of redundant system - Google Patents

Communication line failure prevention circuit of redundant system Download PDF

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Publication number
KR950012224A
KR950012224A KR1019930021624A KR930021624A KR950012224A KR 950012224 A KR950012224 A KR 950012224A KR 1019930021624 A KR1019930021624 A KR 1019930021624A KR 930021624 A KR930021624 A KR 930021624A KR 950012224 A KR950012224 A KR 950012224A
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KR
South Korea
Prior art keywords
duty
standby
state
communication line
prevention circuit
Prior art date
Application number
KR1019930021624A
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Korean (ko)
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KR0157862B1 (en
Inventor
조용기
Original Assignee
성기설
금성계전 주식회사
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Application filed by 성기설, 금성계전 주식회사 filed Critical 성기설
Priority to KR1019930021624A priority Critical patent/KR0157862B1/en
Publication of KR950012224A publication Critical patent/KR950012224A/en
Application granted granted Critical
Publication of KR0157862B1 publication Critical patent/KR0157862B1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Abstract

본 발명은 이중화구조 시스템의 통신라인 장애방지회로에 관한 것으로, 종래 이중화구조 시스템에 듀티와 스텐바이가 자기상태를 확인한 후에 상대방의 상태를 체크하여 송신을 인에이블 또는 디스에이블을 결정함에 있어, 상태라인을 통해 이 상태라인의 상태가 왜곡되면 듀티와 스탠바이 모두 송신을 하던지 서로가 스탠바이 상태로 알고 있어 입출력에 대한 응답을 하지 못하는 경우가 발생될 문제점이 있다.The present invention relates to a communication line failure prevention circuit of a redundant architecture system. In a conventional redundant architecture system, a duty and standby check a state of the other party to determine whether to enable or disable a transmission. If the state of this state line is distorted through the line, both the duty and standby may transmit or the standby state may not be able to respond to the input and output.

따라서 종래의 문제점을 해결하기 위하여 본 발명은 처음 시스템이 듀티와 스탠바이가 결정되어진 후 듀티와 입출력 콘트롤러가 통신하고 있는 동안에 서로 상대방의 시스템 이상 유무를 상태라인 및 사건신호(event signal)발생과 상대방에서 이 사건 카운트 갯수를 확인하여 이상을 확인하고 자기자신 시스템 뿐만 아니라 상대방의 시스템에서 제어되도록 한 효과가 있다.Therefore, in order to solve the conventional problems, the present invention provides a status line and an event signal occurrence status and an event signal at the other party while the system is communicating between the duty and input / output controllers after the duty and standby have been determined. By checking the number of event counts, it is possible to confirm the abnormality and to be controlled by the counterpart's system as well as the own system.

Description

이중화구조 시스템의 통신라인 장애방지회로Communication line failure prevention circuit of redundant system

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 종래 이중화구조 시스템의 통신라인 회로도.1 is a communication line circuit diagram of a conventional redundant structure system.

제2도는 본 발명 이중화구조 시스템의 통신라인 장애방지 회로도.2 is a communication line failure prevention circuit diagram of the redundant system of the present invention.

제3도는 본 발명에 있어서, 이중화구조 시스템의 통신라인 장애방지방법에 대한 제어흐름도.3 is a control flow chart for the communication line failure prevention method of a redundant structure system in the present invention.

Claims (1)

입출력 콘트롤러(1)와 데이타 통신을 하기 위한 시스템1, 2(2)(3)와, 상기 시스템1, 2(2)(3)과 입출력 콘트롤러(1) 간의 듀티와 스탠바이가 절체되면 데이타를 송신 및 수신 가능하도록 한 데이타 송수신부(4)와, 상대방 시스템의 송신인에이블상태 및 사건발생을 체크하여 상대방 및 자신의 시스템을 콘트롤 할 수 있도록 한 입출력구동부(5)와, 상기 입출력구동부(5)의 구동신호에 따라 상기 데이타 송수신부(4)의 동작을 제어하는 낸드게이트(ND1)(ND2)로 구성된 이중화 구조시스템의 통신라인 장애방지회로.Transmit data when system 1, 2 (2) (3) for data communication with I / O controller 1, and duty and standby between system 1, 2 (2) (3) and I / O controller 1 are switched And a data transmitting / receiving unit (4) capable of receiving, an input / output driver (5) for controlling the counterpart and its own system by checking the sendable state and occurrence of events of the counterpart system, and the input / output driver (5). Communication line failure prevention circuit of a redundant structure system comprising a NAND gate (ND1) (ND2) for controlling the operation of the data transmission and reception unit (4) in accordance with the drive signal of. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930021624A 1993-10-18 1993-10-18 Communication line error protecting circuit of dual system KR0157862B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930021624A KR0157862B1 (en) 1993-10-18 1993-10-18 Communication line error protecting circuit of dual system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930021624A KR0157862B1 (en) 1993-10-18 1993-10-18 Communication line error protecting circuit of dual system

Publications (2)

Publication Number Publication Date
KR950012224A true KR950012224A (en) 1995-05-16
KR0157862B1 KR0157862B1 (en) 1998-12-15

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ID=19366063

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930021624A KR0157862B1 (en) 1993-10-18 1993-10-18 Communication line error protecting circuit of dual system

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KR (1) KR0157862B1 (en)

Also Published As

Publication number Publication date
KR0157862B1 (en) 1998-12-15

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