KR950009456B1 - Nisc/hdtv signal converting circuit - Google Patents

Abstract

The converter comprises a format converter for horizontally and vertically interpolating and decimating four NTSC signals through a double scan, converting the signal into a high definition TV signal of a screen ratio of 4:3, and outputting the signal to a transmitting unit; a deformat converter for demultiplexing the output of the transmitting unit, horizontally and vertically interpolating and decimating the demultiplexed signals, converting the signals into the NTSC signals, and outputting them in recording unit; and an image dividing processing part for selecting any one signal through the demultiplex, horizontally and vertically interpolating the signal, switching the interpolated signal and an output of a receiving unit, and redisplaying the signals on an extended one screen having a high definition, or four divided screen.

Description

NTSC / HDTV Signal Conversion Circuit

1 is a system configuration according to the present invention.

2 is an exemplary diagram according to a format conversion.

3 is a detailed block diagram of a format converter of the present invention.

4 is a detailed block diagram of interpolation / decimation in FIG.

5 is a detailed block diagram of the format converter of the present invention.

6 is a detailed block diagram of interpolation / decimation in FIG.

7 is a detailed block diagram of the image segmentation processing unit of the present invention.

8 is a waveform diagram of each part in FIG.

9 is a timing diagram of vertical output in FIG.

* Explanation of symbols for main parts of the drawings

1: Format Converter 2: Transmission System

3: deformat converter 4: recording and playback section

5 Image segmentation processor 6: High-definition monitor

7: Receiving System 11: Double Scan Converter

12, 21: vertical horizontal conversion unit 13, 27, 32: memory

14, 22, 29: vertical filter portion 15, 23: vertical deterioration portion

16, 24, 30: horizontal filter unit 17, 25: horizontal demonstration unit

18, 26, 31: signal selector 19: signal delay

20, 28: demultiplexer 33: signal switching unit

SW ₁ : switch

The present invention relates to converting and transmitting NTSC (NTSC) signals into high definition TV (HDTV) signals. In particular, four NTSC signals are converted into high definition TV (HDTV) signals and transmitted. The present invention relates to an NTSC / HDTV signal conversion circuit which records, displays, or enlarges a signal by enlarging or reducing it by a zoom operation or by converting it into four NTSC signals.

Recently, even if high-definition TV (HDTV) is put into practical use, it will remain coexist with NTSC broadcasting for a certain period of time. At this time, it is necessary to reproduce or record the NTSC signal as a high-definition TV (HDTV) signal by transmitting and receiving the NTS method.

The present invention converts four NTSC signals into high-definition TV (HDTV) signals, encodes them, receives and decodes the transmitted signal to be transmitted, and then displays them on a high-definition TV monitor according to a zoom operation. An NTSC / HDTV signal conversion circuit for converting a decoded signal into four NTSC signals for display or recording is described. The present invention will be described in detail with reference to the accompanying drawings. As follows.

First turning the system configuration as shown in FIG. Thus as shown, entity S. seed signal (V -V _{n11 n14)} for each aspect ratio to 4 according to the invention: 3 format converter (Format Converter) for converting the recording format of the high definition television signal (1), the transmission system 2 comprised by the encoder 71 and the transmitter 72 so that the output V1 of this format converter ₁ may be encoded and transmitted, and the output V of this transmission system 2 ₂ ) a receiving system 7 composed of a receiver 73 and a decoder 74 to receive and decode a signal; and an output V ₃ of the receiving system 7 having an aspect ratio 4: 3 (D). V format (or monitor) for recording and reproducing the deformat converter 3 for converting to the recording format of _n1- D _n4 and the output (D _n1 -D _n4 ) of the deformat converter 3, respectively. ) (the recording and reproducing unit (4) configured to 41-44), by optionally selecting an output (V ₃₎ of said receiving system (7) to solidify in accordance with carrying out the zoom (zoom) operation It is composed of the image segmentation processing unit 5 for displaying to the parent Peter 6.

3 is a detailed block diagram of the format converter according to the present invention. As shown therein, 720 × 480 NTS signals V _{n11 to} V _n14 are 720 × 480 through double scan conversion versions 111 to 114, respectively. sunhaeng entity S. seed signal (V _{n21 n24} ~V) output (V ~V _{n21 n24)} for vertical interpolation (interpolation) of the horizontal double-scanning conversion section 11 and the double-scanning conversion section 11 for converting a And vertical interpolation / decimation (121 to 124) configured to output 480 x 360 digital data (H _S6 ), (H _t6 ), (H _U6 ), and (H _V6 ) by performing deduction. And the horizontal converter 12 and the outputs H _S6 , H _t6 , H _U6 , and H _V6 of the vertical and horizontal converters 12 to the first-in, first-out parts 131 to 134, respectively. be configured as a memory 13 for storing the output, the inter four migration / deseo decimation 121 vertically filters the output (V _n21) of the double-scanning vision cone 111. as shown in FIG. 4 (141~ 143) through each Vertical filtering unit 14 performing interpolation, and the outputs V _{S11 to} V _S13 of the vertical filter unit 14 are horizontally deciphered through the vertical decimation 151 to 153, respectively. The vertical desertation section 15 and the outputs V _S12 , V _S22 , V _S23 of the vertical desertation section 15 to the vertical filters 161, 162, 163, 164. And horizontal filtering unit 16 for interpolating vertically through (165, 166), and outputs V _{S31 to} V _S36 of the horizontal filter unit 16 (171 to 176). ), And the horizontal deterioration section 17 performing horizontal deduction through the horizontal decay section, and the outputs V _S41 , V _S42 , V _S43 , V _S44 , and V of the horizontal deterioration section 17. A signal selector 18 for inputting _S45 and V _S46 to the multiplexers 181, 182, and 183 for selective output, and the outputs of the signal selector 18 (V _S52 ) and (V _S53 ). Delay line delay through horizontal line delays 191 and 192, respectively It consists of 19, and inter-port migration / deseo decimation (122-124) is the inter-port migration / deseo constitute the same manner as decimation 121.

The fifth turn and the demultiplexer (20) for this invention the output as a detailed block diagram of a de-format converter as shown to, to high-definition television format, the output signal (V ₃₎ demultiplexing the receiving system (7), a demultiplexer ( output (VD _n 1~VD _n4) of 20), the internal capsule illustration / deseo decimation (211-214) and through each of performing horizontal and vertical interpolation (interpolation) and culling (decimation) entity S. seed signal (D1 ₁ It is composed of the vertical and horizontal converters 21 to output to ˜D _n4 ), and the mutual interdependence / decimation 211 respectively outputs the output VD _n1 of the demultiplexer 20 as shown in FIG. 6. The vertical filter unit 22 for interpolating vertically by inputting the vertical filters 211 to 224 of the vertical filter unit 22 and the vertical deserialization unit 231 for output VD _{11 to} VD ₁₄ of the vertical filter unit 22. A vertical deterioration section 23 for horizontally deciding through ˜234, respectively, The outputs VK _{1 to} VK _{4 of the} simulation unit 23 are input to the horizontal filters 241A to 241c, 242A to 242B, 243A to 243C, and 244A to 244C, respectively, to perform horizontal interpolation. Horizontal filter unit 24 and the outputs (VK _{11 to} VK ₁₃ ), (VK _{21 to} VK ₂₃ ), (VK _{31 to} VK ₃₃ ), and (VK _{41 to} VK ₄₃ ) of the horizontal filter unit 24 are horizontal. Horizontal desorption part 25 which performs horizontal deduction through desification 215A-251C, (252A-252C), (253A-253C) and (254A-254C), respectively, and this horizontal deserialization part 25 ), (VL _{11 to} VL ₁₃ ), (VL _{21 to} VL ₂₃ ), (VL _{31 to} VL ₃₃ ), and (VL _{41 to} VL ₄₃ ) are input to the multiplexers 261 to 264 to select one signal. A signal selector 26 for outputting, a memory 27 for temporarily storing and outputting the outputs (VM _{1 to} VM ₄ ) of the signal selector 26 in the first-in first-out parts 271 to 274, and a sequential entity _Turning off the outputs (D _n13 ) and (D _n14 ) of the first-in, first-out (273), (274) to output the seed signal or the NC signal. The switch SW ₁ is configured, and the interposition / decimation 212 to 214 is configured in the same manner as the interposition / decimation 211.

7 is a detailed block diagram of the image segmentation processing unit of the present invention, as shown therein, a demultiplexer 28 for demultiplexing the output V3 of the reception system 7 according to the control signal Ctl ₁ , and this dimmity. A vertical filter unit 29 for interpolating the output V ₄ of the flexure 28 vertically at the vertical filters 291 and 292, and an output V of the vertical filter unit 29. ₅₁ ) and (V ₅₂ ) the horizontal filter unit 30 performing horizontal interpolation through the horizontal filters 301, 302, and 303, 304, respectively, and the output of the horizontal filter unit 30 (V _61). , V ₆₂ ) and (V ₆₃ , V ₆₄ ) are inputted to the multiplexers 311 and 312 to select and output the signal selector 31, and the outputs V ₇₁ and (of the signal selector 31. the output of the V ₇₂₎ first-in-first-out unit 321, a memory (to output the temporarily stored in 322. 32) and an output (V ₈₎ and the receiving system (7) of the memory (32), (V ₃₎ It consists of a signal switching unit 33 for switching in accordance with the control signal (Ctl ₂ ) .

The operation and effects of the present invention configured as described above will be described in detail with reference to the exemplary diagrams of FIG. 2, the waveform diagrams of FIG. 8 and FIG.

An operation of converting an NTSC signal into a high definition TV signal or converting a converted high definition TV signal into an HDTV signal will be described with reference to FIG. As shown in FIG. 2 (a), a screen having a horizontal 720 pixel and a vertical 240 line has a double scan conversion of an NTSC signal V _n11 of 4: 3 by performing a double scan conversion. Figure 2 (b) a horizontal 720 pixels and vertical 480 lines of the aspect ratio to 4 as shown in: convert sunhaeng entity S. seed (Progressive NTSC) signal (V _n21) of the third and the converted signals (Vn21) horizontally interpolated 2, deduction 3, and interpolation 3 and deduction 4 vertically, the high-definition TV (HDTV) signal having an aspect ratio of 4: 3, which is 480 pixels horizontally and vertically 360 lines as shown in FIG. VD ₁₁ ).

According to the present invention, as it is configured to transmit four NTSC signals, it is converted to a high-definition TV (NTSC) signal and has a horizontal ratio of 1280 pixels and vertical 720 lines as shown in FIG. In the high-definition TV format of FIG. 2, the area of the horizontal 960 pixels and the vertical 720 lines as shown in FIG. 2 (c) is divided into four.

At this time, if you want to record high-definition TV (HDTV) signal (VD ₁₁ ) with 4: 3 aspect ratio on the TV or HDTV type VHD, the converted high-definition TV signal is divided into four for each As shown in FIG. 2 (b), horizontal interpolation 3 and round 2 are performed as well as horizontal interpolation 3 and round 2 to a progressive 720 HD pixel signal of progressive 480 lines. By converting or performing vertical interpolation 2 and rounding 3, the signal is converted into an _NTS signal V _n11 of 720 pixels horizontally and 240 lines vertically.

In addition, the high-definition TV signal VD ₁₁ having an aspect ratio of 4: 3 may be reproduced by selecting only one program in a zoom mode or by simultaneously selecting four signals by a zoom operation.

That is, as the four NTS signals are converted into high-definition TV signals and transmitted and received, the high-definition TV signals may be reproduced or received by converting the received high-definition TV signals into four NTS signals and recorded or reproduced.

Referring to the above-described conversion operation, when the NC signals V _{n11 to} KV _n14 as shown in FIG. 2A are input to the format converter 1, the block diagrams of FIG. 3 are respectively shown. As the double scan is performed in the double scan conversion of the double scan conversion unit 11, signals of 720 pixels horizontally and 480 lines vertically as shown in FIG. 2 (b) (V _n21 -V _n24) ) Performs interpolation 3 and rounding 4 vertically through interpolation / decimation 121 to 124 of the vertical and horizontal conversion unit 12, and then performs interpolation 2 and rounding 3 horizontally. The signals H _S6 , H _t6 , H _U6 , and H _{V6 of the} horizontal 480 pixels and the vertical 360 lines are converted and temporarily stored in the first-in, first-out portions 131 to 134 of the memory 13.

In this case, when the operation of the interposition / decimation 121 is explained in the detailed block diagram of FIG. 4, the output V _n21 of the double scan conversion version 111 is the vertical filter 141-143 of the vertical filter unit 14. ), Vertical interpolation 3 is performed, and parallel conversion is performed to the signals V _{S11 to} V _S13 of the horizontal 720 pixels and the vertical 480 lines as shown in FIG. V _{S11 to} V _S13 are respectively inputted to the vertical deterioration 151 to 153 of the vertical deterioration section 15, and vertical deduction 4 is performed so that horizontal 720 pixels and vertical 120 as shown in FIG. The signal V _{S21 to} V _S23 of the line is output to the horizontal filter unit 16.

Accordingly, the horizontal filters 161, 162, 163, 164, and 165 and 166 of the horizontal filter unit 16, which have received the outputs V _{S21 to} V _{S23 of} the vertical deterioration unit 15, are inputted. Accordingly, horizontal interpolation 2 is performed to perform parallel conversion of the horizontal 720 pixels and the vertical 120-line signals V _{S31 to} V _{S36 as} shown in FIG. 8C. The converted signals V _{S31 to} V _S36 are performed. ) Is input to the horizontal desserts 171 to 176 of the horizontal dessert unit 17, respectively, and the horizontal rounding 3 is performed, respectively, so that the horizontal rounding 3 is input to the horizontal 240 as shown in FIG. As shown in FIG. 8 (d), the signals V _S41 , V _S42 , V _S43 , V _S44 , and V _S45 and V _{S46 of the} horizontal 240 pixels and 120 vertical lines are selected from the signal selection unit. Inputs are made to the multiplexers 181 to 183 in (8).

At this time, the multiplexers 181 to 184 of the signal selection unit 18 input the outputs V _S41 and V _S42 , V _S43 and V _S44 and V _S45 and V _S46 of the horizontal decimation unit 17. In response to the multiplexing, the signals V _{S51 to} V _S52 of horizontal 480 pixels and 120 vertical lines as shown in FIG. 8E are output, and the signals V _S52 and V _S53 are signal delay units ( 19H delays 1H and 2H through the line delays 191 and 192, respectively, so that the interoperation / desorption 121 is horizontally 480 pixels as shown in FIG. The signal H _S6 is outputted.

Then, the interpolation / decimation 122 to 124 operates in the same manner as the interoperation / decimation 121 operating as described above, so that the signal H _t6 as shown in FIG. 8 (f), (H _U6 ), (H _V6 ), and the outputs of the interpolation / decimation (121 to 124) (H _S6 ), (H _t6 ), (H _U6 ), and (H _V6 ) are shown in FIG. Scanned vertically as shown in the timing chart shown in FIG.

Accordingly, the outputs H _S6 , H _t6 , H _U6 , and H _{V6 of the} vertical and horizontal converters 12 are temporarily stored in the first-in, first-out parts 131 to 134 of the memory 13, and horizontally 720. As the four signals VD _{11 to} VD ₁₄ of the pixel and the vertical 480 lines are output, the high-definition TV signal V ₁ having the format as shown in FIG. 2C is output to the transmission system 2.

At this time, the transmission system 2 receiving the output V ₁ of the format converter 1 converts the encoder 71 into a specific form for error correction and small data amount transmission, and the converted signal is transmitted to the transmitter 72. The transmission path is transmitted to the reception system 7 by a 6 MHz band as a cable for terrestrial broadcasting or a cable for cable broadcasting.

Accordingly, the receiving system 7 which has received the output V ₂ of the transmitting system 2 detects the detected signal, which is subjected to error correction and loss compensation through the decoder 74 and thus close to the original signal (V). ₃ ) is outputted to the format converter 3 or the Youngsan division processing unit 5.

Therefore, when the high quality TV signal V ₃ having a format as shown in FIG. 2C is output from the receiving system 7, the image segmentation curry section 5 selects only one program or selects four programs. By selecting at the same time, the enlarged screen or the screen divided into four parts is reproduced on the high quality monitor 6.

At this time, when the image division processing unit 5 receives the output V ₃ of the reception system 7, the demultiplexer 28 is horizontal (480) pixels shown in the second (c) by the control signal Ctl ₁ , As one of the signals VD _{11 to} VD ₁₄ of the vertical 360 lines is selected, the selected signal V ₄ is input to the vertical filters 291 and 292 of the vertical filter unit 29 to perform vertical interpolation 2. Horizontally 480 pixels and vertical 360-line signals V ₅₁ and V ₅₂ are input to the horizontal filters 301, 302, and 303, 304 of the horizontal filter unit 30. When horizontal interpolation 2 is performed, horizontally converted 480 pixels, vertical 360 lines of signals V ₆₁ , V ₆₃ , and V ₆₃ , V ₆₄ are multiplexed by the multiplexer 311 of the signal selector 31. , 312 is entered.

Accordingly, as the multiplexers 311 and 312 multiplex the outputs V ₆₁ , V ₆₃ , V ₆₃ , V ₆₄ of the horizontal filter unit 30, the signal V of the horizontal line 960 pixels and the resin 360 lines V ₇₁ ) and (V ₇₂ ) are temporarily stored in the first-in, first-out unit 321 and 322 of the memory 32 to be output, so that the signal V ₆ of the horizontal 960 pixels and the vertical 720 lines is transmitted to the signal switching unit 33. Is output.

Therefore, when the signal switching unit 33 selects the output V ₈ of the memory 32 by the control signal Ctl ₂ , one program enlarged on the high quality monitor 6 is reproduced and the reception of the reception system 7. If you select the output (V ₃ ), four programs are divided and reproduced on one screen.

In addition, when the output V ₃ of the reception system 7 is converted into four NTSC signals to record or play back the NTC type V or monitor, the signal V ₃ is received. The deformat converter 3 divides the four signals VD _n1 -VD _n4 in the demultiplexer 20 and interpolates the interpolation / decimation of the vertical horizontal conversion unit 21 to 211 to 214. By performing the vertical interpolation 4 and the vertical rounding 3 respectively, and performing the horizontal interpolation 3 and the horizontal rounding 2, the forward NTS or NTS signals D _{n1 to} D _n4 are outputted to the recording / reproducing section 4. Lose.

At this time, the interpolation / decimation 211 inputs the output VD _n1 of the demultiplexer 20 which is 480 pixels horizontally and vertically 360 lines to the vertical filters 221 to 224 of the vertical filter unit 22 to perform vertical interpolation. By performing 4, four signals VD _{11 to} VD ₁₄ , which are horizontal 480 pixels and vertical 360 lines, are generated, and the vertical decimation of the vertical decimation unit 23, which receives the signals VD _{11 to} VD ₁₄ , respectively, is performed. 231 to 234 perform vertical deduction 3 to apply signals VK _{1 to} VK ₄ , which are 480 pixels horizontally and 120 lines vertically, to the horizontal filters 241A to 241C, 242A to 242C, and ( 243A-243C) and (244A-244C).

Accordingly, the horizontal rounding 3 is performed in the horizontal filter unit 24 so that the signals 480 pixels horizontally and 120 lines vertically (VK _11- VK ₁₃ ), (VK _21- VK ₂₃ ), and (VK _31- VK ₃₃ ) are performed. , (VK _{41 to} VK ₄₃ ) are input to the horizontal desertification units 241A to 251C, 252A to 252C, 253A to 253C, and 254A to 254C of the horizontal desertation section 25 The signals of the 240 pixels horizontal and 120 vertical lines (VL _{11 to} VL ₁₃ ), (VL _{21 to} VL ₂₃ ), (VL _{31 to} VL ₃₃ ), and (VL _{41 to} VL ₄₃ ) are respectively selected. Are input to the multiplexers 261 to 264, respectively.

At this time, the multiplexers 261 to 264 output the outputs VL _{11 to} VL ₁₃ , VL _{21 to} VL ₂₃ , VL _{31 to} VL ₃₃ , and VL _{41 to} VL ₄₃ of the horizontal demodulation unit 25. By multiplexing the signals 720 and horizontal 120 lines of signals (VM _{1 to} VM ₄ ) are respectively stored in the first-in, first-outs 271 to 274 of the memory 27 and turning on the switching SW ₁ , the first-in-first-out unit ( The outputs D _{S11 to} D _{S14 of} 271 to 274 are sequentially output, and a forward 720 NTC, 480 vertical progressive NTSC signal is output and the switch SW ₁ is turned off. The outputs D _S11 and D _{S12 of the} sections 271 and 272 are sequentially output to output an NTSC signal of 720 horizontal pixels and 20 vertical lines.

And, interoperation / decimation 212-214 is operated in the same manner as interoperation / decimation 211 described above.

Therefore, as the outputs D _{S11 to} D _S14 of the format converter 3 are input to the recording / reproducing section 4, recording (or reproducing) to the NTC-type V-real monitor (or monitors 41 to 44, respectively) is performed. It is done.

As described in detail above, the NTSC / HDTV signal conversion circuit of the present invention converts four NTSC signals into high-definition TV signals to transmit and receive a high-definition TV signal. It can be recorded or played back by converting the received high-definition TV signal into the original NTS signal at the same time. Accordingly, applying the present invention has the effect of simultaneously viewing or recording and reproducing high-definition TV signals and NTS signals.

Claims (10)

High-quality TV signals with an aspect ratio of 4: 3 as four NTSC signals (V _{n11 to} V _n14 ) are double scanned and interpolated and deduced horizontally. ₁ ) The format converter 1 converted to the output system 2 and outputted to the transmission system 2 and the output V ₂ of the transmission system 2 are demultiplexed and demultiplexed as the reception system 7 decodes them. A de-format converter 3 for converting (VD _{n1 to} VD _n4 ) horizontally and vertically to convert NTSC signals D _{n1 to} D _n4 and output them to the recording / playback unit 4. ), and the receiving system (V ₃₎ output (V ₃₎ and then to select any one signal of a through demultiplexing vertical and enlarged by performing the interpolation in the horizontal, the magnified signal (V ₈₎ and the receiving system of the By switching the output (V ₃ ) of (7), the high-definition monitor (6) resizes one enlarged screen or four divided screens An NTSC / HDTV signal converting circuit, characterized by comprising an image segmentation processing unit 5. According to claim 1, wherein the format converter (1) has four entities seed S (NTSC) signal (V ~V _{n11 n14)} for each double scanning (double scan) to the aspect ratio 4: sunhaeng Yen TS (Progressive NTSC) seeds, 3 output signal (VF _n21 ~V ₂₄₎ perpendicular to each other, by performing interpolation and jogging the horizontal high-definition TV in the double scanning conversion section 11 and the double-scanning conversion section 11 for converting into (V _{n21 n24} ~V) Vertical and horizontal converter 12 for converting into signals H _S6 , H _t6 , H _U6 , and H _V6 , and outputs H _S6 and () of the vertical and horizontal converter 12. H _t6 ), (H _U6 ), (H _V6 ) Temporarily stores and outputs a memory (13) NTSC / HDTV signal conversion circuit characterized in that. The method of claim 2, wherein the double scan conversion unit 11 comprises a double scan conversion (111 to 114) for double scanning four anti-NC signals (V _{n11 to} V _n14 ). NTSC / HDTV signal conversion circuit. 3. The interpolation / dececation0 of claim 2, wherein the vertical horizontal conversion unit 12 interpolates and deduces the outputs V _{n11 to} V _n14 of the double scan conversion unit 11 vertically and horizontally, respectively. NTSC / HDTV signal converting circuit, comprising: 121 to 124. 5. The vertical filter unit 14 according to claim 4, wherein the interpolation / decimation 121 receives a signal V _n21 and performs vertical interpolation 3, and an output V _S11 of the vertical filter unit 14. Each of the vertical deterioration unit 15 that receives ˜V _S13 ) and performs vertical deduction 4 and the outputs V _S21 ˜V _S23 of the vertical deterioration unit 15, respectively, perform horizontal interpolation 2. The horizontal filter unit 16, the horizontal desorption unit 17 which performs the inference 3 on the outputs V _{S31 to} V _S36 of the horizontal filter unit 16, respectively, and the horizontal desorption unit 17. To output the multiplexed signals (V _{S51 to} V _S53 ) by inputting the outputs (V _S41 , V _S42 ), (V _S41 , V _S42 ), (V _S43 , V _S44 ), and (V _S45 , V _S46 ) The signal selector 18 and the signal delay unit 19 for delaying the outputs V _S52 and V _S53 of the signal selector 18 with 1H and 2H, respectively, are provided. 124 is the same as the interporation / decimation 121 Es entity seed, it characterized in that the crab configuration (NTSC) / high definition television (HDTV) signal conversion circuit. The first-in first-out method according to claim 2, wherein the memory 13 temporarily stores and selectively outputs the outputs H _S6 , H _t6 , H _U6 , and H _V6 of the vertical and horizontal converters 12. NTSC / HDTV signal conversion circuit, comprising: (131 to 134). The method of claim 1, wherein the de-format converter 3 includes a demultiplexer 20 for demultiplexing the high-definition television format, the signal (V ₃₎ of a receiving system 7, and the output (VD _n1 of the demultiplexer 20 ~VD a _n4) with vertical and horizontal conversion section 21 vertically, by performing interpolation in the horizontal and culling for converting to said entity S (NTSC) or parade entity S. seed (Prgressiv NTSC) signal (Dn ₁ ~D _{n n 4)} NTSC / HDTV signal conversion circuit characterized in that the configuration. 8. The NTSC / HDTV signal converting circuit according to claim 7, wherein the vertical and horizontal changers (21) consist of interpolation / decimation (211 to 214). 10. The vertical filter unit 22 according to claim 8, wherein the interpolation / decimation 211 receives a signal VD _n1 and performs vertical interpolation 4, and an output VD ₁₁ of the vertical filter unit 22. A vertical deterioration section 23 for performing vertical deduction 4 to? VD ₁₄ , and a horizontal filter section for performing interpolation 3 horizontally between the outputs VK _{1 to} VK ₄ of the vertical deterioration section 23, respectively. (24) and the outputs (VK _11- VK ₁₃ ), (VK _21- VK ₂₃ ), (VK _31- VK ₃₃ ), and (VK _41- VK ₄₃ ) of the horizontal filter unit 24, respectively, and deseo horizontal performing culling 2 decimation unit 25, the output _{(VL 11 ~VL 13), (} VL 21 ~VL 23) of the decimation section 25 deseo is horizontal, (VL ₃₁ ~VL _33), (VL ~VL ₄₃ and ₄₁₎ the input signal (VM~VM ₄₎ an output signal selector (26 for multiplexing received), the output (VM ₁ ~VM ₄₎ of the signal selector 26 in order to temporarily store A memory 27 for outputting the storage signals D _{n11 to} D _n14 , an output D _n13 of the memory 27, It is composed of a switch (SW ₁ ) which controls the output of NTSC or Progressive NTSC signal by turning (D _n4 ) on and off, and interoperation / decimation (212, 214). ) Is configured identically to the interpolation / decimation (211), NTSC / HDTV signal conversion circuit. The demultiplexer (28) according to claim 1, wherein the image division processing unit (5) demultiplexes the output (V3) of the reception system (7) and outputs only one signal according to the control signal (Ctl ₁ ), and the demultiplexer (28). Vertical interpolation 2 performing vertical interpolation 2 of the output V ₄ ) and outputs V ₅₁ and V ₅₂ of the vertical filter unit 29 to perform horizontal interpolation 2. The horizontal filter unit 30 and the outputs V ₆₁ , V ₆₂ and V ₆₃ and V ₆₄ of the horizontal filter unit 30 to output the multiplexed signals V ₇₁ and V ₇₂ . A signal selecting section 31, a memory 32 for temporarily storing and sequentially outputting the outputs V ₇₁ and V ₇₂ of the signal selecting section 31, and an output V of the memory 32. ₈ ) and a signal switching unit 33 for selectively outputting the output V ₃ of the reception system 7 according to a control signal Ctl ₂ . HDTV) signal conversion circuit.