KR950008237B1 - Method of semiconductor package manufacture - Google Patents
Method of semiconductor package manufacture Download PDFInfo
- Publication number
- KR950008237B1 KR950008237B1 KR1019920019809A KR920019809A KR950008237B1 KR 950008237 B1 KR950008237 B1 KR 950008237B1 KR 1019920019809 A KR1019920019809 A KR 1019920019809A KR 920019809 A KR920019809 A KR 920019809A KR 950008237 B1 KR950008237 B1 KR 950008237B1
- Authority
- KR
- South Korea
- Prior art keywords
- chip
- wafer
- lead
- thermoplastic
- heated
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
Abstract
Description
제1도는 종래의 LOC 패키지의 제작순서도.1 is a manufacturing flowchart of a conventional LOC package.
제2도는 본 발명의 써모플라스틱 코팅액이 도포되는 웨이퍼의 평면도.2 is a plan view of a wafer to which the thermoplastic coating liquid of the present invention is applied.
제3도는 본 발명의 가열된 리이드프레임의 내부리이드에 칩을 접착하는 개략 구조도.Figure 3 is a schematic structural diagram of bonding the chip to the inner lead of the heated lead frame of the present invention.
제4도는 본 발명에 의해 내부리이드에 접착된 칩에 외이어 본딩한 상태의 LOC 평면도.Figure 4 is a plan view of the LOC in the state of the outer wire bonded to the chip bonded to the inner lead in accordance with the present invention.
제5도는 본 발명이 적용되는 LOC 패키지의 내부단면도.5 is a cross-sectional view of the LOC package to which the present invention is applied.
본 발명은 칩 상에 리이드를 배선하는 구조를 갖는 리이드 온 칩(Lead on chip ; 이하, LOC라 칭함) 패키지 제조방법에 관한 것으로서 특히, 열가소성(Thermoplastic, 이하, 써모플라스틱이라 칭함) 물질을 사용하여 웨이퍼를 코팅함으로써 패키지 제조공정을 단순화할 뿐만 아니라, 원가절감에도 기여할 수 있는 반도체 패키지 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a lead on chip (LOC) package having a structure for wiring a lead on a chip, and in particular, using a thermoplastic (hereinafter, referred to as a thermoplastic) material. The present invention relates to a method of manufacturing a semiconductor package that can not only simplify a package manufacturing process by coating a wafer but also contribute to cost reduction.
종래에 있어서의 LOC 패키지 제조방법은 제1도에 도시한 바와 같이, 패드(PAD)가 없는 리이드프레임(1)을 폴리이미드테이프(Polyimide Tape : 2)를 이용하여 칩(3)과 접착시키는 방법이었다.In the conventional method of manufacturing a LOC package, as shown in FIG. 1, the lead frame 1 without the pad PAD is bonded to the chip 3 using a polyimide tape 2. It was.
구체적으로 예를 들면, 50μm 두께를 갖는 베이스필름에 25μm 두께를 갖도록 양면에 써모플라스틱 접착제가 도포된 폴리이드테이프를 사용하여 칩과 리이드프레임을 접착하는 것이었다.Specifically, for example, a chip and a lead frame were adhered to each other using a polyid tape coated with a thermoplastic adhesive on both sides of the base film having a thickness of 50 μm to have a thickness of 25 μm.
그러나, 이와 같은 방법에 의해 제조된 종래의 LOC 패키지는, 비록 폴리이미드 테이프가 내열성 수지로 열에는 강한면이 있으나, 자체의 흡습율이 높아서 패키지품질을 저하시킬 우려가 있고, 이에 따른 영향으로 내부리이드 사이에 버블이 발생하는등의 폐단이 있었다.However, the conventional LOC package manufactured by such a method, although the polyimide tape is a heat-resistant resin and has a strong side to heat, there is a concern that the moisture absorption rate is high and thus the package quality may be degraded. There were closed ends such as bubbles between the leads.
또한, 폴리이미드 테이프가 고가이므로 결과적으로 패키지 제조원가가 상승될 수 밖에 없고, 테이프 본딩작업으로 인하여 별도의 장비가 필요하게 되고, 최상의 접착상태를 유지하기 위한 작업조건을 조절하기가 곤란한 등의 많은 문제점이 있었다.In addition, since polyimide tape is expensive, the manufacturing cost of the package is inevitably increased, and additional equipment is required due to the tape bonding operation, and it is difficult to control the working conditions for maintaining the best adhesion state. There was this.
따라서, 본 발명은 이와 같은 종래의 여러가지 문제점을 제거하고자 이루어진 것으로써, 폴리이미드 테이프를 사용치않고 단순히 써모플라스틱 물질을 도포한 상태에서 웨이퍼를 코팅함으로써 패키지 제조공정을 단순화하고, 원가를 절감함은 물론, 패키지 품질을 향상시킬 수 있는 반도체 패키지 제조방법을 제공하는데 그 목적이 있다.Therefore, the present invention was made to eliminate various problems of the related art, and it is possible to simplify the package manufacturing process and reduce costs by coating a wafer without using a polyimide tape and simply applying a thermoplastic material. Of course, the purpose is to provide a method for manufacturing a semiconductor package that can improve the package quality.
이와 같은 목적을 달성하기 위한 본발명은, LOC 제조공정에 있어서의 다이본딩시, 리이드프레임을 히터 블록을 이용하여 폴리이미드 사용시의 작업온도까지 가열한 상태에서 내부리이드를 직접 칩과 접착시키는 것을 특징으로 한다.In order to achieve the above object, the present invention is characterized in that, during die bonding in the LOC manufacturing process, the inner lead is directly adhered to the chip while the lead frame is heated to the working temperature when using the polyimide using a heater block. It is done.
이하, 본 발명의 실시예를 도면을 참조하여 상세히 설명한다.Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
제2도는 본 발명의 써모플라스틱 코팅액이 도포되는 웨이퍼의 평면도, 제3도는 본 발명의 가열된 리이드 프레임의 내부리이드에 칩을 접착하는 개략 구조도, 제4도는 본 발명에 의해 내부리이드에 접착된 칩에 와이어 본딩한 상태의 LOC 평면도, 제5도는 본 발명이 적용되는 LOC 패키지의 내부 단면도이다.2 is a plan view of a wafer to which the thermoplastic coating solution of the present invention is applied, and FIG. 3 is a schematic structural diagram of bonding a chip to an inner lead of a heated lead frame of the present invention, and FIG. 4 is attached to an inner lead according to the present invention. Fig. 5 is a plan view of the LOC in the state of wire bonding to the chip.
본 발명의 목적을 달성하기 위해서는, 웨이퍼 코팅시 첫째, 다이를 접착할 수 있고 둘째, 다이표면을 보호할 수 있는 등의 두가지 역할을 수행할 수 있는 열가소성물질 즉, 써모플라스틱 물질이 필요할 뿐만 아니라, 패키지 제조측면에서는 내부리이드와 칩간에 최대 접착력이 가해질 수 있도록 접착조건이 선행되어야 한다.In order to achieve the object of the present invention, in addition to the need for a thermoplastic material, that is, a thermoplastic material, which can perform two roles in wafer coating, first, to bond the die and second, to protect the die surface. In terms of package manufacturing, the bonding conditions must be preceded so that the maximum adhesion between the inner lead and the chip can be applied.
또한, 칩 회로에 손상을 끼치지 않도록 코팅물질의 두께를 최적 상태로 조절함으로써 칩과 내부리이드간의 완충역할도 겸할 수 있도록 해야 한다.In addition, by adjusting the thickness of the coating material to an optimal state so as not to damage the chip circuit, it should also serve as a buffer between the chip and the inner lead.
또한, 써모플라스틱 접착코팅액은 일정온도에서 점성을 가지므로 공정상의 문제점을 최소화하는 범위내에서 작업할 수 있는 작업조건(은도, 시간, 압력) 선정이 중요하다.In addition, the thermoplastic adhesive coating liquid has a viscosity at a certain temperature, it is important to select the working conditions (silver, time, pressure) that can work within the range to minimize process problems.
제2도에 도시한 바와 같이, 써모플라스틱코팅액(10)이 웨이퍼(20)에 도포되며, 제3도에 도시한 바와 같이, 칩(40)의 상면에 도포된 코팅액이 접착력을 가질 수 있도록 리이드프레임(50)을 가열한다. 이때, 상기 리이드프레임(50)은 다이본더의 히터블록을 통해 웨이퍼상면에 도포된 써모플라스틱 코팅액이 접착력을 갖도록 가열한다.As shown in FIG. 2, the thermoplastic coating liquid 10 is applied to the wafer 20, and as shown in FIG. 3, the coating liquid applied to the upper surface of the chip 40 has an adhesive force. The frame 50 is heated. At this time, the lead frame 50 is heated so that the thermoplastic coating liquid applied to the upper surface of the wafer through the heater block of the die bonder has an adhesive force.
이에따라, 상기 리이드프레임(50)을 구성하는 내부리이드(60)도 소정온도로 가열되므로 이 가열된 내부리이드(60)와 칩(40)을 접착시킨다.Accordingly, since the inner lead 60 constituting the lead frame 50 is also heated to a predetermined temperature, the heated inner lead 60 and the chip 40 are adhered to each other.
즉, 상기 써모플라스틱코팅액(10)은 열가소성 수지로써, 열을 가하면 용해되고 그렇지 않을 경우에는 굳어지므로 최적의 접착력을 가질 수 있도록 소정온도를 소정시간동안 열을 가하여 용해한 다음, 내부리이드(60)와 칩(40)을 접착시키는 것이다.That is, the thermoplastic coating liquid 10 is a thermoplastic resin, which melts when heat is applied and otherwise hardens, so that the thermo plastic coating liquid is dissolved by applying heat for a predetermined time so as to have an optimum adhesive strength, and then the inner lead 60 and The chip 40 is bonded.
이와 같이 본 발명의 반도체 패키지 제조방법에 의하면, 다이본딩시 내부리이드를 테이프를 사용치않고 직접 칩 상면에 접착시키므로 패키지 박형화를 달성할 수 있고, 가열된 리이드를 칩상면에 접착시 써모플라스틱 코팅액이 재용해 되므로 접착력이 유지되어 패키지 품질이 향상될 뿐만 아니라, 접착테이프 자체에서 발생되면 불량요인을 제거시키므로 품질향상을 달성할 수 있다. 또한, 공정을 단순화할 수 있고, 원가를 절감할 수 있는 경제적인 잇점이 있는 것이다.As described above, according to the method of manufacturing a semiconductor package of the present invention, since the inner lead is directly bonded to the upper surface of the chip without using a tape during die bonding, package thinning can be achieved. As it is re-dissolved, the adhesive force is maintained to improve the package quality, and when the adhesive tape itself is generated, it removes the defect factor, thereby improving the quality. In addition, there is an economical advantage that can simplify the process and reduce the cost.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920019809A KR950008237B1 (en) | 1992-10-27 | 1992-10-27 | Method of semiconductor package manufacture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920019809A KR950008237B1 (en) | 1992-10-27 | 1992-10-27 | Method of semiconductor package manufacture |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR940010282A KR940010282A (en) | 1994-05-24 |
| KR950008237B1 true KR950008237B1 (en) | 1995-07-26 |
Family
ID=19341812
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019920019809A KR950008237B1 (en) | 1992-10-27 | 1992-10-27 | Method of semiconductor package manufacture |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR950008237B1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990016046A (en) * | 1997-08-12 | 1999-03-05 | 윤종용 | Chip adhesive device with built-in heating device |
-
1992
- 1992-10-27 KR KR1019920019809A patent/KR950008237B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR940010282A (en) | 1994-05-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5888847A (en) | Technique for mounting a semiconductor die | |
| US5140404A (en) | Semiconductor device manufactured by a method for attaching a semiconductor die to a leadframe using a thermoplastic covered carrier tape | |
| JP2972096B2 (en) | Resin-sealed semiconductor device | |
| KR100747134B1 (en) | Solder bump and wire bonding by infrared heating | |
| JPH0528906B2 (en) | ||
| KR950008237B1 (en) | Method of semiconductor package manufacture | |
| JPH05315490A (en) | Semiconductor element | |
| JPS59231825A (en) | Semiconductor device | |
| JP2813873B2 (en) | Semiconductor package having transparent window and method of manufacturing the same | |
| JPS6313337A (en) | Process of mounting semiconductor element | |
| JPH04142042A (en) | Manufacture of semiconductor device | |
| KR20020089492A (en) | Pre-application of die attach material to wafer back | |
| KR950010111B1 (en) | Semiconductor package manufacture method | |
| JPS62128534A (en) | Sealing method for semiconductor device | |
| JPH0366152A (en) | Semiconductor integrated circuit module | |
| KR100244500B1 (en) | Loc package and fabrication method thereof | |
| JP2000299328A (en) | Bonding of liquid crystal polymer tape and mounting of semiconductor chip onto lead frame | |
| JP3060100U (en) | Suspended chip package | |
| JPS63177430A (en) | Sealing method for semiconductor device with resin | |
| JPH06177316A (en) | Lead frame for tab mounting and its mounting method | |
| KR200169834Y1 (en) | Semiconductor package | |
| JPH11135539A (en) | Semiconductor device and its manufacture | |
| JPH07176557A (en) | Semiconductor device | |
| JPH06181236A (en) | Semiconductor integrated circuit device and its manufacture | |
| JPH0992779A (en) | Lead frame for multi-chip loc package and semiconductor element package using it |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| G160 | Decision to publish patent application | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20060630 Year of fee payment: 12 |
|
| LAPS | Lapse due to unpaid annual fee |