KR950004956U - Circuit - Google Patents
CircuitInfo
- Publication number
- KR950004956U KR950004956U KR2019930012025U KR930012025U KR950004956U KR 950004956 U KR950004956 U KR 950004956U KR 2019930012025 U KR2019930012025 U KR 2019930012025U KR 930012025 U KR930012025 U KR 930012025U KR 950004956 U KR950004956 U KR 950004956U
- Authority
- KR
- South Korea
- Prior art keywords
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019930012025U KR960003644Y1 (en) | 1993-07-01 | 1993-07-01 | Frequency multiplier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019930012025U KR960003644Y1 (en) | 1993-07-01 | 1993-07-01 | Frequency multiplier |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950004956U true KR950004956U (en) | 1995-02-18 |
KR960003644Y1 KR960003644Y1 (en) | 1996-04-27 |
Family
ID=19358276
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019930012025U KR960003644Y1 (en) | 1993-07-01 | 1993-07-01 | Frequency multiplier |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR960003644Y1 (en) |
-
1993
- 1993-07-01 KR KR2019930012025U patent/KR960003644Y1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR960003644Y1 (en) | 1996-04-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20050322 Year of fee payment: 10 |
|
LAPS | Lapse due to unpaid annual fee |