KR950004789B1 - Method for growing polycryst alline of silicon - Google Patents

Abstract

The crystal growth method for polycrystalline silicon comprises (a) laminating the buffer layer on an insulating glass substrate, (b) forming the intermediate material layer of low melting point metallic or other compounds including fluorine, hydrogen and chlorine etc. on the buffer layer for liquid phase growth, (c) forming amorphous or polycrystalline silicon layer on the mediation material layer by electron beam deposition or sputtering, and (d) annealing the above laminates at 600 deg.C for less than 10 hrs. and cleaning.

Description

Crystal Growth Method of Polycrystalline Silicon

1A to 1C are process flow charts for showing a crystal growth method of polycrystalline silicon according to the present invention.

The present invention relates to a crystal growth method of polycrystalline silicon, and more particularly, to a crystal growth method of polycrystalline silicon capable of growing at low temperatures.

In response to the demands for personalization and space saving of displays in charge of the interface of human-to-machine for information transmission in the image information age, various flat displays have been developed and rapidly spread in place of the huge CRT. Among them, the progress of liquid crystal display (LCD) technology is remarkable, and color quality has already been comparable to or even higher than CRT.

The LCD is classified into a simple matrix type and an active matrix type in which switching elements are arranged for each pixel. The active matrix type uses a thin film transistor (TFT) according to the type of the switching element, and a thin film diode. There is a mold that uses. In addition, the simple matrix technology is unsuitable for application to high-end products in terms of response speed and image quality, and TFT technology has been proposed as a countermeasure. That is, the root cause of the deterioration in image quality is a crosstalk phenomenon. When a signal is input to a data line and a timing line in a simple matrix type liquid crystal panel, a pixel is caused by two voltage differences. In this case, the voltage of the pixel around the target pixel also affects the liquid crystal reaction, causing deterioration of image quality. Therefore, by employing the active matrix method and arranging switching elements in each pixel, this problem can be solved and clear picture quality can be obtained, and application to high definition and large screen products is possible.

The structure of the TFT is roughly classified into a stagger type and a planar type, and the structure is almost determined depending on whether amorphous silicon or polycrystalline silicon is used as the semiconductor layer of the TFT.

As the kind of amorphous silicon TFT, which has begun to be realized due to the OA device propensity, stagger type structure, ie, reverse stagger type and positive stagger type, is proposed, and the maximum temperature of the process is low as 300 ℃. Inexpensive glass substrates are used. It is widely used in the reverse stagger type which is electron, and there is little plasma damage to amorphous silicon at the time of film-forming. The field effect mobility of the former is larger than that of 0.5 to 1 cm 2 / V · S.

In addition, polysilicon TFTs, which are used for view finders and the like and are also being developed as large panels, have good crystallinity of the polysilicon surface layer on the opposite side of the glass substrate, so that a planar structure can be formed on the surface layer. A positive stagger type is employed, and the field effect mobility is usually about 10 times that of amorphous silicon TFTs, and a relatively low cost glass substrate is used.

To overcome the limitations of amorphous silicon TFTs, polycrystalline silicon TFTs made at low temperatures are attracting attention.

Since the amorphous silicon TFT is manufactured at a process temperature of about 300 ° C. and uses a low cost glass substrate, it is expected to realize a large area device in practical use. However, there are many problems that must be solved in order to realize the manufacturing cost equivalent to CRT. For example, the problem of the peripheral driver circuit using the IC chip and its mounting cost cannot be ignored.

The problem is also great in LCDs that are HDTV (High Definition Tele-Vision) -compliant or large screen high-precision LCDs. In these cases, the number of lines increases and the storage capacity of the pixel needs to be increased. However, in amorphous silicon TFTs with low mobility, it is difficult to keep the aperture ratio of the pixel by reducing the TFT size.

Furthermore, there are many traps in the amorphous silicon and the insulating film formed by plasma CVD (Chemical Vapor Deposition), which causes instability of the TFT operation.

Considering the limitations of amorphous silicon TFTs, the necessity of low-temperature polysilicon TFT process technology manufactured by a manufacturing process almost equivalent to that of amorphous silicon TFTs is increasing, and an active matrix type in which peripheral driver circuits are integrated on a glass substrate by using the same Development of liquid crystal displays is expected.

The process temperature of the low temperature polycrystalline silicon TFT is determined by the heat resistance temperature of the substrate to be used. Therefore, in view of mass production of large area devices such as liquid crystal displays employing the polysilicon TFT, the necessary conditions as the substrate are: first, stable supply amount is to be ensured, and second glass distortion point temperature is TFT process temperature. It should be higher enough, the thermal shrinkage is small with respect to the third TFT process temperature and process time, and the thermal shock against the temperature rise and fall of the fourth TFT process, and the chemical or etching gas used in the fifth TFT process. No erosion, no elution of sixth alkali, etc.

In the current state, hard glass such as alkali-free glass and BSG (Boro-Silicate Glass) has a strain point temperature of 600 ° C or higher. Therefore, the low temperature polysilicon TFT process temperature should be 600 ° C or less.

However, the problem of heat shrinkage is particularly severe, and shrinks as much as 10 to 100 µm per 100 mm even with hard glass at 600 ° C for 1 hour. This is because the glass is formed by quenching and solidification in an unbalanced state. In order to eliminate this, it is necessary to anneal for a long time near the strain point temperature in advance. As the screen becomes larger with higher precision and the mask process increases, the problem is serious. Therefore, in order to realize a high yield, high throughput polysilicon TFT process, the process temperature must be sufficiently lower than 600 ° C.

There are three methods for obtaining a polysilicon at low temperature suitable for the characteristics of the conventional polysilicon TFT device. First, a method of tube annealing the amorphous silicon thin film, a second method of laser annealing the amorphous silicon thin film, and a third method of annealing after injecting impurities into the amorphous silicon thin film. However, when using the above methods, there is a limit to lowering the temperature to the process temperature (which must be sufficiently lower than 600 ° C) for realizing the polysilicon TFT, and it takes a long time even if the temperature is lowered. There is a disadvantage of expensive equipment.

Accordingly, an object of the present invention is to provide a crystal growth method of polycrystalline silicon capable of rapid growth at low temperature in order to solve the above problems.

Another object of the present invention is to provide a polycrystalline silicon crystal growth method that can realize the growth of polycrystalline silicon at a low equipment cost.

It is still another object of the present invention to provide a crystal growth method of polycrystalline silicon having a wider selection range of a substrate.

In order to achieve the above objects, the method of the present invention, in the crystal growth method of polysilicon, a polycrystalline silicon thin film by causing a metal or compound having a low melting point to be grown through a liquid phase using a solid solution of silicon It is characterized by forming.

Hereinafter, with reference to the accompanying drawings will be described the present invention.

1A to 1C are process flow charts for showing the crystal growth method of polycrystalline silicon according to the present invention.

In general, systems composed of pure materials are more stable because they have lower internal free energy than systems in which foreign substances are mixed. Thus, when two or more materials are mixed, most systems will melt at temperatures below the melting point of each material. In addition, grain boundary growth is composed of two kinds of diffusion and interfacial reaction. The grain boundary growth through liquid phase has a larger diffusion rate and interfacial reaction rate than growth in a solid phase. Therefore, the particles grow faster in the liquid phase than in the solid phase. Therefore, the method of the present invention, by growing the polysilicon through the liquid phase, the rapid growth of particles at low temperature through the appropriate selection of the medium.

Referring to FIG. 1A, a buffer layer 1 is first deposited on an insulating substrate 10, for example, a glass substrate, and on the buffer layer 1, a medium M1 for liquid phase growth, for example, a low melting point. A metal or a compound having a low melting point is deposited, and then a silicon layer 2, such as amorphous silicon or polycrystalline silicon, is deposited on the medium M1. In this case, the intermediate material may be stacked on any one of the upper and lower portions of the silicon layer, or on all the upper and lower portions. In the embodiment of FIG. 1A, an example in which the intermediate material M1 is stacked on both the upper and lower portions of the silicon layer 2 is adopted. Here, the metal having a low melting point includes all materials having a melting point slightly higher or similar to the strain point of the substrate to be used, and the compound having a low melting point includes hydrogen (H) and fluorine (F). , A compound containing all or part of elements such as chlorine (Cl) and includes all materials whose melting point is slightly higher or similar to the strain point of the substrate to be used. In addition, the intermediate material and the silicon layer are deposited by an electron beam deposition method, a sputtering method, or the like.

Referring to FIG. 1B, the substrate is annealed at a temperature at which the substrate is not strained after the process of FIG. 1A (589 ° C. when the substrate is a Corning # 7059 glass substrate). At this time, the medium material is already in the liquid phase, and through this liquid phase, the silicon is dissolved within the solid-solution limit of the silicon layer is grown. At this time, in order to suppress the evaporation of the liquid phase it is necessary to maintain the atmosphere of the medium, which can be made as follows. That is, since each material has an equilibrium vapor pressure at the same evaporation and deposition rate depending on the temperature, if the target of the additive itself is heat-treated together in a certain part in the same chamber, the equilibrium state is easily reached and further By suppressing evaporation, mediators that can diffuse can be preserved longer.

Here, the growth of the particles is determined by diffusion, and since the diffusion coefficient is generally 100 to 1000 times larger in the liquid phase than the solid phase, the heat treatment time of the annealing is reduced by about 10 to 100 times. Therefore, in the present invention, the conventional heat treatment time of 20 to 120 hours at 600 ° C can be shortened within a maximum of 10 hours. In addition, the polysilicon layer has a larger grain size than in the prior art. Because crystal growth is determined by the nucleation rate and grain growth rate, the grain growth increases until grains of similar size meet each other. Therefore, the nucleation rate is small and the crystal growth rate is large, so that the grain growth can occur largely. In the liquid phase, since the small particles are quickly absorbed into the crystal grains by the fast diffusion rate, the nucleation rate is small in the liquid phase. The resulting nucleus can grow to larger grains. Thus, it can grow into larger particles in a given time.

Referring to FIG. 1C, when the liquid phase is evaporated after a certain time after the process of FIG. 1B, the particles are in solid phase growth to obtain a desired polycrystalline silicon layer (3). Subsequently, when the grown polysilicon layer is applied to the device, a post-treatment process is performed using various cleaning methods to remove the possibility of contamination due to the atmosphere at the evaporation interface.

The polycrystalline silicon layer of the present invention formed through the above-described method can be applied to the gate electrode, the channel layer, and the source / drain electrode portion of the thin film transistor, and the pixel driving of the LCD using the TFT to which the polycrystalline silicon layer is applied Part and LCD image sensor can be applied to the driving circuit part. Also, the present invention can be applied to polysilicon solar cells and the like having a p-i-n (p-type semiconductor-intrinsic semiconductor-n-type semiconductor) structure.

In addition, the method of the present invention is not limited to the above-described TFT and LCD, but can be extended to the extent that the technical idea of the present invention is limited.

As described above, in the crystal growth method of the polycrystalline silicon according to the present invention, it is possible to obtain polycrystalline silicon having a larger grain size at a lower temperature and more quickly by growing the polycrystalline silicon by solid solubility in the liquid phase. Therefore, it is possible to select a low-cost substrate by the above effect, and expensive equipment for annealing is not necessary, thereby reducing the time required for fabrication of the device. Therefore, in the case of LCD, a TFT panel with low manufacturing cost can be obtained.

Claims (10)

Laminating a buffer layer on an insulating substrate; Forming a medium material layer for liquid phase growth on the buffer layer; Forming a silicon layer on the intermediate material layer; And a step of annealing the resultant after the silicon formation. 2. The crystal growth method of polycrystalline silicon according to claim 1, wherein the insulating substrate is a glass substrate. The method of claim 1, wherein the silicon layer is formed between the buffer layer and the media material layer by changing the formation order of the media material layer and the silicon layer. 2. The crystal growth method of polycrystalline silicon according to claim 1, further comprising forming a new medium layer on the silicon layer. The crystal growth method of polycrystalline silicon according to any one of claims 1, 3 and 4, wherein the intermediate material layer is made of a metal having a low melting point or a compound having a low melting point. 6. The crystal growth method of polysilicon of claim 5, wherein the metal having a low melting point is made of all materials having a slightly higher melting point or similar to that of the strain print of the insulating substrate to be used. The compound of claim 5, wherein the compound having a low melting point is a compound containing all or part of elements such as H, F, and Cl, and the melting point is made of all materials that are slightly higher or similar to the strain point of the insulating substrate to be used. Crystal growth method of polycrystalline silicon characterized by the above-mentioned. 5. The crystal growth method of polycrystalline silicon according to any one of claims 1, 3 and 4, wherein the silicon layer is either an amorphous silicon layer or a polycrystalline silicon layer. The crystal growth method of polycrystalline silicon according to any one of claims 1, 3 and 4, wherein the annealing process is performed at a temperature at which the insulating substrate is not strained. 5. The crystal growth method of polycrystalline silicon according to any one of claims 1, 3 and 4, wherein the crystal growth method of the polycrystalline silicon further comprises a cleaning step after the annealing process.