KR950004651Y1 - Circuit for limiting white color peak level dynamically - Google Patents

Abstract

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Description

White Peak Dynamic Limit Circuit in TVs

1 is a circuit diagram showing an internal configuration of a white peak dynamic limiting circuit of a TV according to an embodiment of the present invention, and FIG. 2 is an average picture level circuit in FIG. 1 according to an embodiment of the present invention. Fig. 3 shows a video signal waveform when <Screen 1> is dark, and <Screen 2> shows a video signal waveform when the entire screen is bright.

* Explanation of symbols for main parts of the drawings

10: clipper circuit section 20: reference level setting section

30: image luminance signal amplification unit 40: average screen brightness (APL) circuit

41: first amplifier 42: integrating circuit

43: second amplifier

The present invention relates to a white peak dynamic circuit in a color television receiver, which can dynamically reproduce white peaks on a CRT by suppressing blooming shapes by dynamically limiting white peaks according to screen brightness in an image including white peaks. A white peak dynamic limit circuit of a TV.

Since the conventional white peak limiter is constantly clipped regardless of the brightness of the entire screen according to a preset white peak reference level, it is difficult to reproduce relatively clear white when the entire screen is bright, and blooming when the entire screen is dark. The white color on the screen is blurred.

The present invention was devised in view of the above circumstances, and the white peak dynamic limiting circuit of the TV according to the present invention is a white peak limiter circuit of a video signal. An average screen brightness level (APL) circuit that outputs the average screen level voltage (V _APL ), and a reference level setting unit that sets the reference level based on the power supply (+ Vc) and outputs the corresponding reference level. And a clipper circuit section for clipping an image signal based on a reference level output from the section and an average screen level voltage output from the APL circuit, and an image luminance signal amplifier section for amplifying and outputting a signal clipped from the clipper circuit section. It features.

According to the present invention with the above-described configuration, the reference peak level can be adjusted according to the average screen level voltage of the image coral output to the full screen, thereby reproducing bright white when the whole screen is bright and blooming when the whole screen is dark. The present invention can be suppressed to realize the above object. Next, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a circuit diagram showing a white peak dynamic limit circuit of a TV according to an embodiment of the present invention. In FIG. 10, reference numeral 10 denotes a clipper circuit unit for clipping an input image signal according to a set white peak reference voltage. A reference level setting unit for setting a reference level based on the supplied power, 30 amplifies a signal clipped from the clipper circuit unit 10 from an image luminance signal input through an input terminal and a corresponding signal is output through the output terminal B. FIG. An image luminance signal amplifying unit for outputting an image luminance signal, 40 is an average screen brightness level (APL) circuit for outputting the average screen level voltage for the brightness of the entire screen based on the input image luminance signal.

On the other hand, the clipper circuit section 10 is composed of a clipper transistor Q1, diodes D1 and D2 connected in series to the emitter of the transistor Q1, and a resistor R1 connected to the emitter for applying power to the transistor. ; The reference level setting unit 20 is connected between the divided resistors R5 and R6 to which the applied power supply (+ Vc) is applied and divides the voltage, and the operating point of the transistor Q2 is connected between the connection point of the combined resistor and the base of the buffer transistor Q2. The resistors R4 and the voltage divider resistors R2 and R3, which are connected to the emitter of the buffer transistor Q2 to divide the voltage output from the transistor Q2 and set the reference level, are connected to the connection point, while the other resistors are connected to the connection point. Is composed of the rectifier diode D3 connected to the base of the transistor Q1 of the clipper circuit section 10.

The image luminance signal amplifying section 30 is connected to a transistor Q3 that buffers an image luminance signal through the resistor R8 and an emitter of the transistor Q3 to a transistor Q4 for amplifying a signal output from the transistor Q3. Consists of.

Further, the power supply (+ Vc) is applied to the load resistor R10 of the buffer transistor Q3 and the amplifying transistor Q4, and the resistor R11 for connecting the other end of the resistor R10 to the transistor Q4 and stabilizing the operating point of the transistor Q4. Connect to the emitter of the transistor.

On the other hand, the resistor R8 is connected to the connection point of the transistor Q2 and the resistor R4 in the reference level setting section 20 through the resistor R7, and outputs the average screen level voltage V _APL output from the APL circuit described later in FIG. Is connected to the connection point A of the clipper circuit section 10 and the reference level amplifier 20.

2 is a circuit diagram showing an internal configuration of an average picture brightness (APL) circuit shown in FIG. 1 according to an embodiment of the present invention. In FIG. A first amplifier for amplifying the luminance signal, 42 is an integrating circuit for integrating and leveling the product signal output from the first amplifying circuit 41, and 43 is a DC level output through the integrating circuit 42; A second amplifying unit for amplifying a signal and outputting the corresponding average screen brightness level V _APL to an output terminal.

At this time, the first amplifier 41 connects the resistors R12 and R13 in parallel, connects the emitter of the amplifying transistor Q5 to the connection point of the two resistors, and connects the base to the collector of the transistor Q5. The transistor Q6 is configured to amplify the video signal amplified and output from the transistor Q5. The other end of the resistor R12 is connected to the image luminance signal input terminal, and a power supply (+ Vc) is applied to the diode D4, the resistor R15, the resistor R17, the resistor R19, and the transistor Q8.

In addition, the integrating circuit 42 is configured by connecting a resistor R18 and a capacitor C1 in parallel to the collector of the transistor Q6, and DC-levels the corresponding video signal integrating the video signal output from the transistor Q6.

The amplifying circuit 43 has a transistor Q7 that amplifies the DC level signal output from the integrating circuit and a base connected to the collector of the transistor Q7 to perform impedance matching with respect to the signal output from the transistor Q7. The transistor Q8 is output to the output terminal via the diode D5 connected to the emitter.

In this configuration according to the above configuration, the level of the signal input through the video signal signal input terminal shown in FIG. 1 and applied to the emitter of the transistor Q1 is higher than the white peak reference voltage level applied to the base of the transistor Q1. When it is high, it is turned on and clipped by the difference between the two voltage levels. Therefore, it is clipped to the level dynamically controlled by the screen brightness level voltage (V _APL ) so that the white peak level is dynamically controlled according to the screen brightness, thereby suppressing the blooming phenomenon and making it clear. White can be reproduced.

On the other hand, the clipping reference level voltage of the white peak described above is set to the sum of the reference level voltages set by the divided resistors R2 and R3 and the average screen level voltage output from the above-described APL circuit.

Clipping reference level voltage = reference level voltage level + average screen level voltage of the white peak, the operation of the present invention will be described taking the case where the entire screen is bright, for example.

Conventionally, since the white peak clipping reference level voltage has always been constant, when a signal as shown in (D) of <Screen 2> is inputted, it is clipped as shown in (E). It did not look relatively bright, making it difficult to reproduce vivid whites.

However, according to the present invention, the image signal for the entire screen inputted through the input terminal C of FIG. 2 described above is integrated into the integrating circuit 42 to make the corresponding image code DC level and then amplify the average screen level voltage. If this time, the entire screen is bright for printing (V _APL) in the integrated circuit is being output DC level signal (V1) from the 42 (+) level, and when the entire screen is dark, the DC level signal (V2) When the entire screen is bright, the white peak reference voltage level higher than the white peak reference voltage level higher than the conventional white peak reference voltage level can be obtained. However, V1> V2.

Therefore, when clipping the image luminance signal, the white peak is clipped based on the white peak reference voltage level. Therefore, when the entire screen is bright as shown in (bar) of <Screen 2>, the white peak portion is a conventional fixed reference white. By clipping higher than the peak limit level, the part can be seen more clearly.

As shown in (a) of <Screen 1>, even when the entire screen is dark, since the output level of V _APL output from the APL circuit described above is output at the V2 level, the clipping reference level voltage of the white peak is Will be lowered. Therefore, as shown in (b), a blooming phenomenon occurs due to the brightness of the white peak portion in comparison with a dark screen in the related art. As shown in (c), the clipping limit of the white peak is lower than the reference white peak limit level. By setting the level voltage and clipping the white peak, blooming can be suppressed.

As described above, by using the APL circuit to output the average screen level voltage for the entire screen, the white peak level voltage is dynamically adjusted to reproduce white clearly when the entire screen is bright, and blooming when the entire screen is dark. Can be suppressed.

In addition, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the technical spirit of the present invention.

Claims (2)

A white peak limiter circuit of a video signal, comprising: an average screen brightness level (APL) circuit for outputting an average screen level voltage (V _APL ) for a full screen under a DC level of a video signal output on the full screen; A reference level setting unit for setting a reference level based on Vc) and outputting the corresponding reference level, and clipping the video signal based on the reference level output from the reference level setting unit and the average screen level voltage output from the APL circuit. And a clipper circuit section, and an image luminance signal amplifier section for amplifying and outputting a signal clipped from the clipper circuit section. 2. The integrated circuit of claim 1, wherein the average screen brightness level circuit integrates a first amplifier for amplifying a video signal outputted over the entire screen, and an integrated circuit for DC leveling the signal by integrating the signal output from the first amplifier. And a second amplifier which amplifies the DC level signal output from the integrating circuit and outputs an average screen level voltage.