KR940027587A - Digital Convergence Compensators for Home Projection TVs - Google Patents
Digital Convergence Compensators for Home Projection TVs Download PDFInfo
- Publication number
- KR940027587A KR940027587A KR1019930008141A KR930008141A KR940027587A KR 940027587 A KR940027587 A KR 940027587A KR 1019930008141 A KR1019930008141 A KR 1019930008141A KR 930008141 A KR930008141 A KR 930008141A KR 940027587 A KR940027587 A KR 940027587A
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- KR
- South Korea
- Prior art keywords
- convergence
- converter
- signal
- memory
- correction data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000013307 optical fiber Substances 0.000 claims abstract description 7
- 230000003287 optical effect Effects 0.000 claims abstract description 6
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 5
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- Video Image Reproduction Devices For Color Tv Systems (AREA)
Abstract
본 발명은 가정용 프로젝션 TV의 디지탈 콘버젼스 보정장치에 관한 것으로, 콘버젼스 보정에 대해 완전자동화를 실현하여 콘버젼스 조정시간을 단축하고 정확하게 콘버젼스 조정을 실현할 수 있는 디지탈 콘버젼스 보정장치를 제공함에 그 목적이 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital convergence correction device for a projection TV for home use, which realizes full automation for convergence correction, thereby reducing convergence adjustment time and enabling accurate convergence adjustment. The object is to provide a device.
본 발명은 상기 목적을 달성하기 위하여 수평, 수직 블랭킹 펄스로써 기준클럭을 발생시키는 PLL부(10), 콘버젼스 보정데이타를 저장하는 메모리(11), 상기 메모리(11)의 콘버젼스 보정데이타를 억세스하기 위한 수평 및 수직 어드레스를 발생시키는 어드레스 발생부(12), 상기 메모리(11)에서 리드된 보정데이타를 아날로그 신호로 변환시키는 D/A 변환부(13), 상기 D/A 변환부(13)의 출력신호로 콘버젼스 보정자계를 형성시키는 콘버젼스 요크(CY), 콘버젼스 상태를 입력받기 위한 광파이버가 부착된 스크린(17), 상기 스크린(17)의 광파이버를 통해 광정보를 입력받아 전기신호로 변환시키는 광데이타 변환부(18), 상기 광데이타 변환부(18)에 신호를 디지탈로 변환시키는 A/D 변환부(20), 상기 A/D 변환부(20)의 출력 최대점을 찾아 콘버젼스를 조정하는 마이콤(21)으로 구성함을 특징으로 한다.The present invention provides a PLL unit 10 for generating a reference clock as horizontal and vertical blanking pulses, a memory 11 storing convergence correction data, and a convergence correction data of the memory 11 in order to achieve the above object. An address generator 12 for generating horizontal and vertical addresses for accessing the digital signal, a D / A converter 13 for converting correction data read from the memory 11 into an analog signal, and the D / A converter ( A convergence yoke (CY) for forming a convergence correction magnetic field as an output signal of 13), a screen (17) with an optical fiber for receiving a convergence state, and optical information through the optical fiber of the screen (17). The optical data converter 18 converts the signal into an electrical signal, the A / D converter 20 converts the signal into digital signals, and the A / D converter 20 Find the maximum output point and use the microcomputer 21 to adjust the convergence. Characterized by name.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명의 콘버젼스 보정장치를 나타낸 전체 구성도, 제3도는 크로스 해치 패턴과 휘도와의 관계도, 제4도는 휘도와 전압과의 관계도, 제5도는 상기 제2도중 광데이타 변환부의 상세 구성도, 제6도 (a)(b)(c)는 각각 스크린을 나타내는 전면도, 측면도, 평면도, 제7도는 광파이버를 이용한 디지탈 콘버젼스 보정장치를 나타낸 단면도, 제8도는 조정 알고리즘의 간단한 흐름도, 제9도는 광변환신호 읽기 타이밍도, 제10도는 광파이버의 위치와 크로해치 패턴의 위치를 일치시키기 위한 최대 전압 검색 표시도.FIG. 2 is an overall configuration diagram showing the convergence correction device of the present invention, FIG. 3 is a relationship diagram between cross hatch pattern and luminance, FIG. 4 is a relationship diagram between luminance and voltage, and FIG. 5 is optical data in FIG. 6 (a) (b) (c) are a front view, a side view, a plan view, and FIG. 7 is a sectional view showing a digital convergence correction device using optical fibers, and FIG. 8 is an adjustment FIG. 9 is a timing diagram of the optical conversion signal reading, and FIG. 10 is a maximum voltage search display diagram for matching the position of the optical fiber and the position of the crohat pattern.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930008141A KR940027587A (en) | 1993-05-12 | 1993-05-12 | Digital Convergence Compensators for Home Projection TVs |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930008141A KR940027587A (en) | 1993-05-12 | 1993-05-12 | Digital Convergence Compensators for Home Projection TVs |
Publications (1)
Publication Number | Publication Date |
---|---|
KR940027587A true KR940027587A (en) | 1994-12-10 |
Family
ID=67137418
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930008141A Withdrawn KR940027587A (en) | 1993-05-12 | 1993-05-12 | Digital Convergence Compensators for Home Projection TVs |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR940027587A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100233517B1 (en) * | 1995-10-25 | 1999-12-01 | 윤종용 | Convergence adjustment method and apparatus for wide projection TV |
-
1993
- 1993-05-12 KR KR1019930008141A patent/KR940027587A/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100233517B1 (en) * | 1995-10-25 | 1999-12-01 | 윤종용 | Convergence adjustment method and apparatus for wide projection TV |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19930512 |
|
PG1501 | Laying open of application | ||
PC1203 | Withdrawal of no request for examination | ||
WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |