KR940027492A

KR940027492A - Noise limiting circuit

Info

Publication number: KR940027492A
Application number: KR1019930009611A
Authority: KR
Inventors: 이명환; 송동일
Original assignee: 김광호; 삼성전자 주식회사
Priority date: 1993-05-31
Filing date: 1993-05-31
Publication date: 1994-12-10
Also published as: KR0141241B1

Abstract

이 발명은 노이즈의 크기를 제한하는 노이즈 제한회로에 관한 것이다.The present invention relates to a noise limiting circuit for limiting the magnitude of noise.

이 발명은 고스트 제거회로에서 출력되는 유사 복합 동기신호가 하이이면 동기 레벨신호를 출력하고, 로우이면 상기 고스트 제거회로에서 출력되는 선택신호에 의해 선택된 신호를 출력하는 스위칭부와, 상기 스위칭부의 출력이 외부에서 미리 정한 기준 레벨보다 크면 상기 스위칭부의 출력 레벨을 기준 레벨로 제한하는 제어부로 구성되어, 입력되는 노이즈 신호의 레벨이 미리 설정된 기준 레벨보다 높으면 튜너의 AGC 회로를 제어하여 노이즈 신호의 레벨을 기준 레벨로 제한함으로써 유사 복합 동기신호를 안정시켜 노이즈 신호를 안정적으로 디스플레이할 수 있고, 또한, OSD 신호를 확실하게 인지할 수 있어 노이즈 화면에서 OSD 문자가 흐르거나 보이지 않는 문제점을 해결할 수 있다.The present invention provides a switching unit for outputting a synchronization level signal when the pseudo composite synchronization signal output from the ghost elimination circuit is high and a signal selected by the selection signal output from the ghost elimination circuit, The controller is configured to limit the output level of the switching unit to a reference level when the external level is greater than a predetermined reference level. When the level of the input noise signal is higher than the predetermined reference level, the AGC circuit of the tuner is controlled to reference the level of the noise signal. By limiting the level, the pseudo composite sync signal can be stabilized to stably display the noise signal, and the OSD signal can be reliably recognized, thereby solving the problem of OSD characters not flowing or appearing on the noise screen.

Description

Noise limiting circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 노이즈 입력시 상기 제1도 및 제2도의 각부의 동작 파형도, 제4도는 이 발명에 따른 노이즈 제한회로가 포함된 고스트 제거기의 단순 블럭도, 제5도는 상기 제4도의 노이즈 제어부의 상세 회로도, 제6도는 노이즈 입력시 상기 제4도 및 제5도의 각부의 동작 파형도이다.FIG. 3 is an operational waveform diagram of each part of FIGS. 1 and 2 when noise is input, FIG. 4 is a simple block diagram of a ghost eliminator including a noise limiting circuit according to the present invention, and FIG. 5 is a block diagram of the noise controller of FIG. FIG. 6 is a detailed view of the operation waveforms of FIGS. 4 and 5 during noise input.

Claims

A tuner and an intermediate frequency converter for converting the signal received by the antenna into a video signal of the baseband and outputting the ghost, and removing the ghost if the video signal has a synchronous component, and generating and outputting a pseudo composite synchronizing signal if the video signal does not have a synchronous component. A circuit for clamping and outputting the output of the tuner and the intermediate frequency converter and the output of the ghost elimination circuit to a predetermined level, a microcomputer for outputting an on-screen display signal locked to a horizontal / vertical synchronization signal, A ghost eliminator comprising an output and an adder for adding an output of the switching unit, comprising: switching means for selectively outputting an output or another input of the clamp unit, and an output level of the switching means if the output of the switching means is greater than a predetermined reference level. Furnace consisting of a control unit for restricting the control to a reference level 'S limit circuit.

The noise limiting circuit of claim 1, wherein the controller controls an automatic gain control circuit of the tuner and the intermediate frequency converter.

The control signal generator of claim 1, wherein the controller is further configured to generate a control signal by comparing a reference level setting unit, a sensing unit sensing an output level of the switching means, an output of the reference level setting unit and an output of the sensing unit, and outputting a control signal. Negative noise limiting circuit.

※ Note: This is to be disclosed by the original application.