KR940027324A - Frequency 3 multiplier - Google Patents
Frequency 3 multiplier Download PDFInfo
- Publication number
- KR940027324A KR940027324A KR1019930009080A KR930009080A KR940027324A KR 940027324 A KR940027324 A KR 940027324A KR 1019930009080 A KR1019930009080 A KR 1019930009080A KR 930009080 A KR930009080 A KR 930009080A KR 940027324 A KR940027324 A KR 940027324A
- Authority
- KR
- South Korea
- Prior art keywords
- frequency
- duty cycle
- time constant
- mono1
- multiplier
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
본 발명은 주파수 3체배기에 관한 것으로, 종래 주파수 3체배기는 입력 주파수를 미리 예측하고 이의 3배 주파수에 해당하는 시정수의 R과 C를 결정하여 이를 가변주파수 발진기에 연결하여야하며, 입력주파수의 변화폭이 크면, R, C의 시정수가 맞지 않아 3체배기로 동작하지 않는 문제점이 있었다.The present invention relates to a frequency triplex, the conventional frequency triplex is to predict the input frequency in advance, determine the R and C of the time constant corresponding to the triple frequency thereof and connect it to a variable frequency oscillator, the change in the input frequency If it is large, there was a problem that the time constants of R and C do not coincide with each other, so that the multiplier does not operate.
본 발명은 이러한 문제점을 해결하기 위하여 복수개의 단안정 멀티바이 브레이터를 사용하여 자체 가지고있는 시정수를 이용함으로써 시정수를 미리 예측할 필요가 없고, 입력주파수의 가변 범위를 크게 할 수 있으며, 회로 자체를 전부 디지탈화할 수 있는 주파수 3체배기를 창안한 것이다.The present invention does not need to predict the time constant in advance by using its own time constant using a plurality of monostable multivibrators in order to solve this problem, it is possible to increase the variable range of the input frequency, the circuit itself The invention is to create a frequency tripler that can digitalize all.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 2 도는 본 발명 주파수 3체배기의 구성도, 제 3 도의 (가) 내지 (자)는 각 부의 출력파형도, 제 4 도의 (가) 내지 (다)는 듀티 사이클의 일예도.2 is a configuration diagram of the frequency triplex of the present invention, (a) to (c) of FIG. 3 is an output waveform diagram of each part, and (a) to (c) is an example of a duty cycle.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930009080A KR950010396B1 (en) | 1993-05-25 | 1993-05-25 | Freq 3 multiplier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930009080A KR950010396B1 (en) | 1993-05-25 | 1993-05-25 | Freq 3 multiplier |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940027324A true KR940027324A (en) | 1994-12-10 |
KR950010396B1 KR950010396B1 (en) | 1995-09-16 |
Family
ID=19356007
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930009080A KR950010396B1 (en) | 1993-05-25 | 1993-05-25 | Freq 3 multiplier |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR950010396B1 (en) |
-
1993
- 1993-05-25 KR KR1019930009080A patent/KR950010396B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR950010396B1 (en) | 1995-09-16 |
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Payment date: 20050824 Year of fee payment: 11 |
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