KR940023437U - 에스램 출력회로 - Google Patents
에스램 출력회로Info
- Publication number
- KR940023437U KR940023437U KR2019930005149U KR930005149U KR940023437U KR 940023437 U KR940023437 U KR 940023437U KR 2019930005149 U KR2019930005149 U KR 2019930005149U KR 930005149 U KR930005149 U KR 930005149U KR 940023437 U KR940023437 U KR 940023437U
- Authority
- KR
- South Korea
- Prior art keywords
- output circuit
- sram output
- sram
- circuit
- output
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019930005149U KR950006589Y1 (ko) | 1993-03-31 | 1993-03-31 | 에스램 출력회로 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019930005149U KR950006589Y1 (ko) | 1993-03-31 | 1993-03-31 | 에스램 출력회로 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940023437U true KR940023437U (ko) | 1994-10-22 |
KR950006589Y1 KR950006589Y1 (ko) | 1995-08-14 |
Family
ID=19353091
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019930005149U KR950006589Y1 (ko) | 1993-03-31 | 1993-03-31 | 에스램 출력회로 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR950006589Y1 (ko) |
-
1993
- 1993-03-31 KR KR2019930005149U patent/KR950006589Y1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR950006589Y1 (ko) | 1995-08-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20040719 Year of fee payment: 10 |
|
LAPS | Lapse due to unpaid annual fee |