KR940022241A - Floppy Disk Driver Switching Device - Google Patents

Floppy Disk Driver Switching Device Download PDF

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Publication number
KR940022241A
KR940022241A KR1019930002956A KR930002956A KR940022241A KR 940022241 A KR940022241 A KR 940022241A KR 1019930002956 A KR1019930002956 A KR 1019930002956A KR 930002956 A KR930002956 A KR 930002956A KR 940022241 A KR940022241 A KR 940022241A
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KR
South Korea
Prior art keywords
floppy disk
signal
flop
flip
state
Prior art date
Application number
KR1019930002956A
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Korean (ko)
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KR950004209B1 (en
Inventor
권영돈
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019930002956A priority Critical patent/KR950004209B1/en
Publication of KR940022241A publication Critical patent/KR940022241A/en
Application granted granted Critical
Publication of KR950004209B1 publication Critical patent/KR950004209B1/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

본 발명은 플로피 디스크를 두개 이상 지원할 수 있는 컴퓨터 시스템의 플로피 디스크 드라이버와 플로피 디스크 컨트롤러간의 인터페이스에 있어서, 여러개의 플로피 디스크 드라이버들의 지정번호를 하드웨어의 변환없이 소프트웨어를 이용하여 변경할 수 있도록 구성한 플로피 디스크 드라이버 전환 장치를 사용하므로써 사용자가 필요에 맞게 적절한 상태를 입력하여 플로피 디스크 드라이버들의 지정번호를 정하는 것에 관한 기술이다.The present invention provides an interface between a floppy disk driver and a floppy disk controller of a computer system capable of supporting two or more floppy disks. The floppy disk driver is configured so that designation numbers of a plurality of floppy disk drivers can be changed using software without changing hardware. It is a technique for assigning a designated number of floppy disk drivers by inputting an appropriate state according to a need by using a switching device.

Description

플로피 디스크 드라이버 전환 장치Floppy Disk Driver Switching Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 플로피 디스크 드라이버 전환장치를 도시한 구성도,2 is a block diagram showing a floppy disk driver switching device of the present invention;

제3도는 본 발명의 소프트웨어의 동작원리를 도시한 플로챠트도.3 is a flowchart showing the operating principle of the software of the present invention.

Claims (2)

두개 이상의 플로피 디스크를 지원하는 컴퓨터 시스템에 있어서 플로피 디스크 드라이버들의 지정번호를 결정해주기 위해, 드라이버 선택 신호와 모터 인에이블 신호를 출력하는 플로피 디스크 컨트롤러(21)와, 사용자가 입력한 상태에 의해 CPU에서 출력된 CPU 어드레스를 입력하여 -ADDR신호를 출력하는 어드레스 디코더(25)와, 상기의 -ADDR 신호와 CPU 명령인 -IOW 신호를 입력하는 오아게이트(OR1)와, 상기의 오아게이트(OR1)의 출력과 전원 공급기의 출력인 -PWR 신호에 의해 제어되며, 사용자로부터 입력된 상태에 의해 생성된 CPU 데이타를 DO, -DO로 전달하는 D-플립플롭(24)과, 상기의 플로피 디스크 컨트롤러(21)의 출력인 드라이버 선택 신호와 모터 인에이블 신호를 상기의 D-플립플롭(24)의 출력에 따라, 여러개의 플로피 디스크 드라이버(22,23)에 선택적으로 연결시켜주기 위한 여러개의 트라이-스테이트 버퍼(BF1 내지 BF8)와, 상기의 트라이-스테이트 버퍼(BF1 내지 BF8)에서 전달된 신호들을 플로피 디스크 드라이버(22,23)에 전달시켜주는 여러개의 오픈 콜렉트 타입 버퍼(BUF1 내지 BUF4)와, 상기의 오픈 콜렉트 타입 버퍼(BUF1 내지 BUF4)에서 전달된 신호에 따라 지정번호가 정해지는 플로피 디스크 드라이버(22,23)로 구성되는 것을 특징으로 하는 플로피 디스크 드라이버 전환 장치.In a computer system supporting two or more floppy disks, a floppy disk controller 21 which outputs a driver selection signal and a motor enable signal to determine the designation number of the floppy disk drivers, The address decoder 25 for inputting the output CPU address and outputting the -ADDR signal, the oragate OR1 for inputting the -ADDR signal and the -IOW signal which is a CPU command, and the oragate OR1 described above. Controlled by the -PWR signal, which is the output of the output and the power supply, the D-flip-flop 24 which transfers CPU data generated by the state input from the user to DO and -DO, and the floppy disk controller 21 described above. The driver selection signal and the motor enable signal, which are outputs of the < RTI ID = 0.0 >), are selectively connected to a plurality of floppy disk drivers 22, 23 < / RTI > Several tri-state buffers BF1 to BF8 for transmitting the signals, and several open collect type buffers for transmitting signals transmitted from the tri-state buffers BF1 to BF8 to the floppy disk drivers 22 and 23. And a floppy disk driver (22, 23) whose designation number is determined according to a signal transmitted from the open collect type buffers (BUF1 to BUF4). 제1항에 있어서, D-플립플롭(24)을 제어하기 위한 상태를 불휘발성 램에 저장하고, 이를 이용하여 D-플립플롭을 제어하는 것을 특징으로 하는 플로피 디스크 드라이버 전환 장치.2. The apparatus of claim 1, wherein the state for controlling the D-flip-flop (24) is stored in a nonvolatile RAM and the D-flip-flop is controlled using the same. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930002956A 1993-03-02 1993-03-02 Fdd apparatus KR950004209B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930002956A KR950004209B1 (en) 1993-03-02 1993-03-02 Fdd apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930002956A KR950004209B1 (en) 1993-03-02 1993-03-02 Fdd apparatus

Publications (2)

Publication Number Publication Date
KR940022241A true KR940022241A (en) 1994-10-20
KR950004209B1 KR950004209B1 (en) 1995-04-27

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930002956A KR950004209B1 (en) 1993-03-02 1993-03-02 Fdd apparatus

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KR (1) KR950004209B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102131290B1 (en) 2019-05-02 2020-07-07 (주)라즈웰 Paint ball

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102131290B1 (en) 2019-05-02 2020-07-07 (주)라즈웰 Paint ball

Also Published As

Publication number Publication date
KR950004209B1 (en) 1995-04-27

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