KR940011025B1 - Push-pull trans conductance op amplifier - Google Patents

Abstract

The push-pull trans-conductance arithmetic amplifier decreases static power consumption and has high slew rate. The amplifier comprises a differential input amplifier for amplifying the difference between inverting input and non-inverting input, a push-pull output for amplifying the differential amplified signal, a constant current source for providing constant current, a 1st detector and a 1st variable current source for detecting non-inverting more than inverting input signal and supplying current to differential input amplifier, a 2nd detector and a 2nd variable current source for detecting non-inverting more than inverting input signal and supplying current to differential input amplifier.

Description

Push-pull transconductance operational amplifier

1 is a circuit diagram of a conventional operational amplifier.

2 is a characteristic curve of time versus output voltage by a conventional operational amplifier.

3 is a circuit diagram of an operational amplifier of the present invention.

4 is a characteristic curve of time versus output voltage by the operational amplifier of the present invention.

The present invention relates to a push-pull transconductance operational amplifier, and more particularly, to a push-pull transconductance operational amplifier which reduces static power consumption and has a large value of slew rate.

In general, operational amplifiers were developed as direct current amplifiers for analog calculators, but with the technology of integrated circuits, with the advent of integrated circuit operational amplifiers, stable and inexpensive ones are readily available, making them as convenient as transistors. As a result, it is now used in almost all analog systems as an important basic component of active circuitry, rather than for analog calculators, taking the place of analog processors in the role of microprocessors in digital systems.

An op amp is basically a very large gain series differential amplifier, usually with an external feedback circuit to control the gain bandwidth. The inside of the operational amplifier is composed of many transistors, diodes, resistors, etc., but the user does not need to be concerned with the internal structure, but only needs to pay attention to the voltage-current characteristics of the external terminals. Likewise, it can be treated as a circuit element having any one function. In general, when a circuit having one or several functions is referred to as a single element, it is also called an active element.

Recently, many push-pull differential operational amplifiers with capacitive loads are used.

These general push-pull differential operational amplifiers have input stage transistors (M1, M2, M3, M4) to which differential inputs are applied, and output stage transistors (M6, M7) having a push-pull structure and driving a capacitive load (C _L ). And a current source transistor M5 for supplying current to the differential input terminal, and transistors M8 and M9 for driving a current of the output terminal transistor M7.

In the push-pull differential operational amplifier of FIG. 1, when the potentials applied to the gates of the transistor M2 of the non-inverting input terminal and the transistor M1 of the inverting input terminal are the same, the current flowing through the two input terminals is the same. Therefore, if the offset is ignored in this circuit, the output voltage Vout at the output stage is OV. However, the potential (Vin ⁺⁾ of the non-inverting input terminal the potential of the inverting input terminal ^- is higher than _{^{(Vin +> Vin -) (}} Vin), current (I1) flowing through the transistor (M2) is a transistor (M1) It becomes larger than the current I2 flowing through. As a result, the current I3 flowing through the transistor M4 and the transistor M6 constituting the current mirror flows as much as (S6 / S4) × I1. Here, S6 and S4 represent S ₆ = (W / L) ₆ and S ₄ (W / L) ₄ of the transistors M6 and M4, respectively, W represents the channel width of the transistor and L represents the channel length. The current flowing through the transistor M3 and the transistor M8 constituting the current mirror decreases at a ratio of (S8 / S3) × I2, and the current flowing through the transistor M7 constituting the current mirror with the transistor M9 ( I4) also decreases.

Thus, Vin ⁺ Vin >> ^- when, current is the relation of I3 I4 >> is satisfied, effectively supplying a current to the capacitive load (C _L). On the other hand, Vin ⁺ Vin << ^- when is the relation << I3 I4 is established to effectively discharge the electric charges charged in the capacitive load (C _L). Therefore, the following relation holds for the slew rate representing the maximum change rate (dv / dt) of the output voltage with respect to unit time.

SR = 1 / C _L A · I3 / I1... … … … … … … … … … (One)

As can be seen from Equation (1), in order to increase the slew rate, the current I supplied from the current source M5 must be increased or the value of the capacitive load C _L must be decreased. However, when C _L is a fixed constant, it can be seen that the current value of the current source M5 must be increased. Therefore, the static power consumption of the operational amplifier also becomes large.

FIG. 2 is a graph showing the relationship of time versus output voltage for the push-pull differential operational amplifier of FIG. 1, whereby the response characteristic of the output signal Vout with respect to the input source Vin can be obtained.

At time 2.0μsec 0μsec by the potential (Vin ^+), the potential (Vin ^-) of the inverting input terminal of the non-inverting terminal is greater than ipreok i.e., Vin ⁺ Vin >> ^- represents a case, since the time is 2.0μsec Vin ⁺ << Vin ^- is shown.

As shown in FIG. 2, it can be seen that it takes about 0.7 μsec to increase the output voltage Vout from -3.0V to 3.0V. Likewise, when the voltage drop from 3.0V to -3.0V takes about 0.9μsec.

Therefore, such an operational amplifier has a disadvantage in that the response speed of the circuit becomes slow.

Accordingly, it is an object of the present invention to provide a push-pull transconductance operational amplifier that reduces response power while increasing response speed.

Another object of the present invention is to provide a push-pull transconductance operational amplifier having a fast output response and a large slew rate.

The push-pull transconductance operational amplifier for achieving the object of the present invention described above is a differential input amplifier stage formed of the first and second transistors constituting the inverting input stage and the third and fourth transistors constituting the non-inverting input stage, the second Fifth and sixth transistors for forming a current mirror with a transistor, seventh and eighth transistors for forming a current mirror with a fourth transistor, and a ninth transistor for forming a first inverter circuit together with the seventh transistor; A nineth transistor and a current mirror, a tenth transistor forming the fifth transistor and a second inverter circuit, an eleventh transistor constituting the eighth transistor and a third inverter circuit, and a current mirror with the eleventh transistor And a twelfth transistor, the first and third transistors forming the sixth transistor and a fourth inverter circuit. A constant current source inserted between the common source terminal and the negative power source of the STER, a first variable current supply source connected in parallel with the constant current source and driven by an output of the first inverter circuit, and connected in parallel with the constant current source A second variable current source driven by an output of a fourth inverter circuit, a thirteenth transistor for forming a current mirror with the fourth transistor, and a push-pull output stage with the thirteenth transistor to form a current mirror with the tenth transistor; And an output for driving a capacitive load from a connection point between the thirteenth transistor and the fourteenth transistor.

Hereinafter, more details of the present invention will be described with reference to the accompanying drawings.

3 shows a circuit diagram of a push-pull transconductance operational amplifier of the present invention.

First, the differential input terminal is composed of transistors M1 and M3 constituting the inverting input terminal and transistors M2 and M4 constituting the non-inverting input terminal. The load transistor M3 of the inverting input stage together with the transistors M13 and M8 constitute a current mirror, respectively. The transistor M8 forms an inverter circuit with the transistor M9, and the transistor M9 forms a current mirror together with the transistors M15 and M7.

Next, the load transistors M4 of the non-inverting input terminals M2 and M4 form a current mirror with the transistors M16, M11 and M6, respectively, and the transistors M16 constituting the current mirror with the transistor M4 In addition, an inverter circuit is formed together with the transistor M15 constituting the current mirror with the transistor M9, and an output V1 of the inverter circuit is connected to a gate of the transistor M17 serving as a variable current source. The transistor M11 constituting the current mirror with the transistor M4 forms an inverter circuit together with the transistor M10, and the transistor M12 constituting the current mirror with the transistor M10 is the transistor M13. ) To configure the inverter circuit. In addition, the output V2 of the transistors M12 and M13 constituting the inverter circuit is connected to the gate of the transistor M14 serving as a variable current source.

On the other hand, the transistor M5 has a drain terminal serving as a current supply source and is commonly connected to the drains of the transistors M14 and M17 which are variable current sources.

In addition, the transistor M6 constituting the current mirror together with the load transistor M4 of the non-inverting input stage forms a push-pull output stage together with the transistor M7, and an operational amplifier from a connection point between the transistor M6 and the transistor M7. The output Vout of is obtained, thereby driving the capacitive load C _L connected to the output.

The transistor M7 is connected to the transistor M9 so as to form a current mirror in order to supply a constant current to the output terminals M6 and M7 as in the related art.

On the other hand, the load M3 of the inverting input terminal and the transistor M8 constituting the current mirror are connected to the drain of the transistor M9 to supply a constant current to the transistor M9.

The transistors M1 through M9 represent the circuit of a basic transconductance operational amplifier.

This time, look at the operation of the push-pull transconductance operational amplifier of the present invention.

When the potential Vin ^- applied to the gate of the transistor M1 of the inverting input terminal and the potential Vin ⁺ applied to the gate of the transistor M2 of the non-inverting input terminal are the same, the state of the basic transconductance operational amplifier is the same. . In other words, if the offset is ignored, the output terminal voltage is OV. At this time, the current supplied to the differential pressure stage is supplied by the current source transistor M5, and the variable current source transistors M14 and M17 remain in the off state.

On the other hand, Vin ⁺ Vin >> ^- when a transistor current (I11) flowing through the non-inverting input terminal consisting of (M2 and M4) is flowing than the current (I12) flowing through the transistor (M1, M3) constituting the inverting input terminal do. As a result, the current flowing through the transistor M11 constituting the current mirror with the transistor M4 flows by 11 times the size ratio S11 / S14 of the two transistors.

The transistor M10 constituting the transistor M11 and the inverter circuit form a current mirror with the transistor M12 so that a constant current flows through the transistor M12, and constitutes an inverter circuit with the transistor M12. Since the transistor M13 forms a current mirror with the load transistor M3 of the inverted differential input terminal, the drain of the transistor M12 to which the gate of the transistor M14 is connected is close to the voltage Vss, so that a variable current supply source is provided. Almost no current flows through the transistor M14.

In addition, since the current of the inverting input terminals M1 and M3 decreases as the current of the non-inverting input terminals M2 and M4 increases, the current flowing through the load transistor M3 and the transistors M13 and M8 constituting the current mirror is also reduced. Will decrease. Accordingly, the voltage V _DS 9 between the drain and the source of the transistor M9 is equal to the voltage V _NS 15 between the gate and the source of the transistor M15. Therefore, the current flowing through the transistor M15 decreases. However, since the current of the load transistor M4 of the non-inverting input terminal and the transistor M16 constituting the current mirror increases, the current flowing through the variable current source transistor M17 increases and the current I11 flowing to the non-inverting input terminal Flow by Δ1.

The current I11 flowing to the non-inverting input stage flows by ΔI more than before, so that a larger current is supplied to the transistor M6 of the push-pull output stage forming the current mirror with the load transistor M4, while flowing to the inverting input stage. The current is reduced and thus the current flowing through the transistor M8 is reduced, so that almost no current flows through the transistor M7 of the push-pull output stage and most of the current flows through the capacitive load C _L. The voltage Vout rises sharply.

As seen in Equation (1), the slew rate (SR) increases when more current is supplied through the variable current supply source, and the slew rate at this time is expressed by the following equation (2).

SR = 1 / C _L A and _X and │1II-I12│ ... … … … … … … … … … … (2)

Where A is a feedback factor.

Ten thousand and one, Vin ⁺ Vin << ^- that is, the potential applied to the inverting input terminal (Vin ^-) is greater that the inverting input terminal (M1, M3) than the potential (Vin ⁺⁾ is applied to the non-inverting input terminal is a current (I12) flowing through the The current flowing through the non-inverting input terminals M2 and M4 is greater than that of the current I11, so that the current flowing through the transistor M3 and the transistors M8 and M13 constituting the current mirror increases by the size ratio of the transistors. Therefore, the current of transistor M15 constituting the current mirror with transistor M9 also increases.

Relatively, the currents of the transistors M16, M11, and M6 constituting the current mirror are reduced. Since the current flowing through the transistor M15 becomes larger than the current flowing through the transistor M16, the voltage of V1 is close to Vss, so that little current flows through the variable current supply source M17.

On the other hand, the current of the transistor M11 constituting the current mirror with the transistor M4 decreases, so that the transistor M10 connected to the transistor M11 flows less. As a result, the current flowing through the transistor M10 and the transistor M12 constituting the current mirror decreases, while the currents of the transistor M12 and the transistor M13 constituting the inverter are relatively increased with increasing current at the inverting input terminal. As a result, the transistor M14 is driven to increase by ΔI = A · I11-I12│.

In addition, the current I12 flowing through the inverting input terminal flows as much as ΔI so that more current flows through the transistor M8 which forms the current mirror with the transistor M3, so that the increased current is increased with the transistor M9. More flows through the transistor M7 constituting the current mirror. Therefore, the charge charged in the capacitive load C _L is rapidly discharged through the transistor M7. The result is increased slew rate and faster response.

4 is a characteristic curve of time versus output voltage obtained by the push-pull transconductance operational amplifier of the present invention.

Fourth, as shown in Fig, Vin ⁺ Vin >> ^- if the output voltage (Vout) is takes about 0.1μsec until it rises to 3.0V. This time can be seen that the output voltage rises in a considerably fast time compared with the time required for the conventional operational amplifier is 0.7μsec.

As a result, Vin ⁺ Vin >> ^- when the transistor (M6) is a capacitive load to supply a current (C _L), and Vin ⁺ Vin << ^- a transistor (M7) when the current in the load (C _L) The effect of supplying can be obtained.

According to the push-pull transconductance operational amplifier of the present invention, all transistors except the transistors M5, M3, and M4 are in an off state, and in the present invention, the constant current source transistors are provided according to the provision of the first and second variable current sources. Since M5 can be configured to a smaller size than in the related art, power consumption is small when in a static state, and output by additional current supply of the variable current source transistors M14 and M17 in normal operation. There is an advantage that can increase the response speed and slew rate.

Claims (5)

A differential input amplifier stage formed of first and second transistors constituting an inverting input stage and third and fourth transistors constituting a non-inverting input stage, fifth and sixth transistors forming a current mirror with the second transistor, and the fourth transistor; A seventh and eighth transistor for forming a current mirror, a ninth transistor for forming a first inverter circuit together with the seventh transistor, a ninth transistor and a current mirror, and a fifth transistor and a second inverter circuit A tenth transistor to be formed, an twelfth transistor constituting the eighth transistor and a third inverter circuit, a twelfth transistor to form a current mirror with the eleventh transistor and the sixth transistor and a fourth inverter circuit; A constant current source inserted between the common source terminal of the first and third transistors and the sub-power source, the constant current source A first variable current supply source connected in parallel and driven by an output of the first inverter circuit, a second variable current supply source connected in parallel with the constant current source and driven by an output of the fourth inverter circuit, the fourth transistor And a thirteenth transistor forming a current mirror, and a thirteenth transistor forming a push-pull output stage with the thirteenth transistor, and forming a current mirror with the tenth transistor. A push-pull transconductance operational amplifier, characterized in that it generates an output for driving a capacitive load from a connection point. The push-pull transconductance operational amplifier according to claim 1, wherein the inverting input side and the non-inverting input side except for the output terminal are configured to correspond to each other. 2. The push-pull transconductance calculation of claim 1, wherein the first variable current source is driven when the non-inverting input is greater than the inverting input, and the second variable current source is driven when the non-inverting input is greater than the inverting input. amplifier. A push-pull transformer comprising a differential input amplifier stage for amplifying a difference between an inverted signal input and a non-inverted signal input, a push-pull output stage for amplifying the differential amplified signal, and a constant current source for supplying a constant current to the differential input amplifier stage. In a conductance operational amplifier, a first detecting means for detecting that the non-inverting signal input is larger than an inverting signal input, and a first variable current for supplying current to the differential input amplifier stage in accordance with the output of the first detecting means. A further source, second detection means for detecting that the inverted signal input is greater than the non-inverted signal input, and a second variable current source for supplying current to the differential input amplifier stage in accordance with the output of the second detection means. And the first and second variable current sources and the first and second detection means comprise the non-inverting signal input and the inverting signal input. If the same, it characterized in that a push operation is not - full trans-conductance operational amplifier. 5. The method of claim 4, wherein the differential input amplifier stage comprises an inverted signal input stage and a non-inverted signal input stage, and further comprising: third detection means for detecting a current change in the inverted signal input stage and a current change in the non-inverted signal input stage. And a fourth detecting means, wherein the first detecting means comprises: a first transistor and a third detecting means for forming a load and a current mirror of the non-inverting signal input terminal for detecting a change in current flowing through the non-inverting signal input terminal; And a second transistor controlled by the second transistor, wherein the second detection means comprises a third transistor and a fourth detection means for forming a load and a current mirror of the inverted signal input to detect a change in current flowing through the inverted signal input. Push-pull transconductance calculation, characterized in that it comprises a fourth transistor controlled by Aeration.