KR940010434B1 - Read-solomon error correction code system - Google Patents

Abstract

The reed solomon error correction code system proper to HDTV or HDVCR corrects an error and an erasure caused in a digital data transmission and simultaneously performs encoding and decoding. The system includes an erasure multinomial generator for inputting erasure position signal according to the input of error flag signal, getting an erasure position multinomial function, and generating; an error flag counter; a multiplier for multiplying a syndrome multinomial function and the erasure multinomial function; an euclid algorithm for performing a euclid computing process and forming an error size and a position multinomial function; and a corrector for performing a Chien search and a Forney algorithm and also performing error and errasure corrections under a controller's control.

Description

Reed-Solomon Error Correction Code System

1 is a block diagram of a conventional error correction code system.

2 is a block diagram of an encoding / decoding device of the Reed-Solomon error correction code system of the present invention.

3 is a diagram for explaining encoding in FIG. 2;

4 is a diagram for explaining decoding in FIG. 2;

* Explanation of symbols for main parts of the drawings

21: syndrome generating part 22: missing polynomial generating part

23: error flag counter 24: multiplication unit

25: Euclidean Algorithm 26: Funny Algorithm

27: correction unit 28: control unit

29: first-in, first-out RAM 30: roots generation part

The present invention relates to a Reed-Solomon Error Correction Code (ECC) system that is suitable for high-definition television (HDTV) or high-definition VCR (HDVCR). The present invention relates to a Reed-Solomon error correction code system capable of correcting error and erasure, and performing both encoding and decoding.

As shown in FIG. 1, the block configuration of the conventional error correction code system includes a syndrome generator 1 for receiving a received signal R (x) to generate a syndrome and generating the syndrome, and generating the syndrome. From the syndrome (S (x)) of negative (1), the error position polynomial function (∧ (x)) and the error magnitude polynomial function ( Euclid's algorithm (2) for obtaining (x)), a polynomial operator (3) for inputting an error position and an error magnitude by the Euclid's algorithm (2) and an error polynomial function (E (x)), and the polynomial operator Inverting ROM 4 for inverting and storing the error polynomial function E (x) received from (3), and the signal of the first-in, first-out RAM 5 for temporarily storing the received signal R (x) sequentially. And an error correcting unit 6 for receiving an error polynomial function of the polynomial operation unit 3 and an output of the inversion ROM 4, respectively, correcting an error in a received signal, and outputting the error R '(x).

In the conventional technique configured as described above, when the received signal R (x) is input to the syndrome generator 1, a syndrome S (x) is generated from the received signal, which is then performed by the Euclidean algorithm 2 again. Error position polynomial function (∧ (x)) and error size polynomial function ( (x))

The error position polynomial function (∧ (x)) and the error size polynomial function ( (x)) forms an error polynomial function (E (x)) in the polynomial calculation unit (3) using Chien Search and Forney Algorithm, and sends the error polynomial (E) to the error correction unit (6).

Then, the error correction unit 6 receives the received signal R (x) through the first-in, first-out RAM 5, the error polynomial function E (x) through the polynomial calculating unit 3, and the inversion ROM 4. The corrected signal R '(x) is output by correcting an error from the incoming signal.

However, in the conventional technology as described above, only error correction is possible, and there is no correction function for the loss correction, which causes inconvenience, and when encoding, an encoding IC (IC) is required separately, thereby increasing the chip area. There was a problem such as being.

In order to solve such a conventional problem, the present invention receives the missing position signal at the time when an error flag occurs and finds the size and position information for the error, and finds only the size information for the error and corrects the error. The Reed-Solomon error correction code system can be operated at the same time, and when the loss location is generated in the parity portion of the code word, it is modified to form a code word to be transmitted, thereby acting as encoding and decoding. The present invention is described in detail below with reference to the accompanying drawings.

2 is a block diagram of a Reed-Solomon error correction code system according to the present invention. As shown therein, a received signal R (x) is received and a root is received from a root generator 30. Process a syndrome to generate a syndrome (Syndrome) 21 and the error flag (flag) signal input and the missing position signal received the missing position polynomial function ( (x)) a missing polynomial generator 23 for obtaining the error flag, an error flag counter 23 for counting an error flag signal, and a missing position polynomial function of the missing polynomial generator 22; (x)) and the multiplication unit 24 performing a multiplication operation on the syndrome function S (x) of the syndrome generating unit 21, and the loss position function (of the missing polynomial generator 22). multiplication output (S (x)) of the multiplication unit 24 of (x) (x)) and the Euclid operation according to the number of error flags of the error flag counter 23 to perform an error size polynomial function ( (x)) and the error magnitude polynomial function (E) from the Euclidean algorithm 25, which is generated by obtaining the error position polynomial function ∧ (x). (x)) and an error location polynomial function (∧ (x)), and a Funney algorithm (26) that obtains the error polynomial function (E (x)) according to chien search and offset (26). ) And a signal sequentially output from the first-in, first-out RAM 29 that sequentially pauses the received signal R (x) as an error polynomial function E (x) of the funny algorithm 26. According to the control of (28), it consisted of the correction part 27 which corrects and outputs an error.

Referring to the operation and effect of the present invention configured as described above in detail.

If none of the error flag signals are generated, no loss occurs, and thus the missing position polynomial function generated from the missing polynomial generator 22 ( (x)) (x)

1 is inputted to the multiplier 24 and the Euclidean algorithm 25, and since the error flag counter 23 has no error flag, the number is zero. Therefore, the values inputted to the Euclidean algorithm (25) are missing position polynomial functions ( (x)) As the Euclidean algorithm is performed with (x) = 1, the number of error flags = 0, and the output of the multiplier 24 = S (x), the magnitude polynomial function for the error ( (x)) and the positional polynomial function ∧ (x). Then, the functions are formed into an error polynomial function E (x) through the funnial algorithm 26 using the parent search and the offset, and the first-in, first-out RAM in the correction unit 27 as the error polynomial function E (x). The error of the received signal R (x) received from (29) is corrected so as to output the original signal R '(x) that is out of power. This is the same technique as the conventional error correction only.

However, when one or more error flags are generated, the missing polynomial function first receives the missing position signal together with the missing polynomial function ( (x)). When the syndrome generator 21 generates the syndrome polynomial function S (x) as the received signal R (x) by using the roots generated from the muscle generator 30, the syndrome polynomial function ( S (x)) and the missing position polynomial function ( (x)) is multiplied by the multiplier 24 (S (x)) (x)) and input to the Euclidean algorithm 25. In addition, the number of error flags counted by the error flag counter 23 and the missing position polynomial function by the Euclidean algorithm 25 ( If (x)) is input, the Eucrede algorithm is performed with the inputs as initial values.

By performing the Euclidean algorithm, the error-position polynomial function (함 (x)) and the error-size polynomial function ( (x)), and the error position polynomial function (∧ (x)) contains information about the missing position ( (x)) and the positional information (σ (x)) regarding the error are included together. In other words,

X (x) = σ (x) (x)

σ (x) is a pure error-position polynomial function.

Of course, error size polynomial functions ( (x)) also contains information about errors and losses. They then go through prosearch and funny algorithms 26 to form a complete error polynomial (E (x)). The formed error polynomial E (x) is input from the correction unit 27 and the signal R '(corrected in error and disappearance to the signal R (x) sequentially received from the first-in, first-out RAM 29 is provided. output x)). This makes it possible to correct even if the error and disappearance are mixed at the same time.

It can also be used as an encoding IC, which generates a codeword that will be modified if it is generated in the parity part of the codeword. If the background is as follows.

When the received signal R (x) is input to the syndrome generator 21, the syndrome polynomial function S (x) is The coefficients of S (x) are obtained from the received R (x) coefficients and the roots of G (x) = 0 generated from the root generator 30.

S: user's offset value

t: error correction capability

Thus, received R (x) = C (x) + E (x) = R _n-1 X ^n-1 +,... , + R and X + R ₀ .

Where C (x) is a codeword and C (x) = M (x) X ^2t + M (x) X ^2t mod G (x), M (x) is a message polynomial function, mod is a module and n Is the size of the codeword.

In the Euclidean algorithm (25), the error position polynomial function (∧ (x)) and the error size polynomial function ( Let's look at (x)).

First, X ^2t B _i (x) + ∧ _i (x) S (x) = _i (x), -1 ≤ _i ≤ n + 1, and B _i (x) and ∧ _i (x) and Suppose the initial value of (x) is

B _-1 (x) = 1 B ₀ (x) = 0

∧ _-1 (x) = 0 ∧ ₀ (x) = (x)

_-1 ^2t (x) = S (x) (x)

Then, the equation by Euclidean theory is obtained by increasing i by one by the operation of the cycle using the initial value as follows.

_{i-2 i-1 i i}

_I-2 (x) = ∧ _i-1 (x) Q _i (x) + ∧ _i (x) (2)

It stops when the calculation by Equation (1) (2) is as follows.

If it stops at this time _i (x) and ∧ _i (x) Let x be x and x.

Therefore, the error position polynomial function (∧ (x)) and the error size polynomial function ( (x)), it goes through the chien and funny algorithms. First, the parent search finds roots with error location polynomial size (크기 (x)) of 가 (x) = 0. Insert elements into x to see if ∧ (α ⁱ ) = 0. At that time, an error occurred in Ni in the root α ⁱ , where N is the total number of elements.

In this way, if the α ⁱ from the parent search is sent to the funny algorithm 26, the funny algorithm has the first derivative ∧ '(x) and from (x) Which is the error size. This forms E (x).

In addition, the missing polynomial generator 22 has a missing position signal when the error flag signal is displayed and a missing position polynomial function ( (x)), and the error flag counter 23 counts the number of error flags E required by the Euclidean algorithm. Thus, the missing position polynomial function ( (x)) is formed and the number of error flags (E) is counted. (x)) is multiplied by the syndrome polynomial function S (x) of the syndrome generator 21, but modX ^2t is calculated.

As mentioned above, the codeword formation process that will occur in the parity part during encoding is explained based on a mathematical theory, and the figure shown in FIG. When (x) is input to the syndrome generator 21 as the reception signal R (x), R (x) = C (x) + E (x) as described above, so that the codeword shown in (b) (C (x) = M (x) X ^2t ) and an error (?) Occur, as in (b). You can put any data in the part, but there are nk error flag (e · f) signals as in (c).

The circuit then corrects the word code (C (x) = M (x) X ^2t mod G (x)) part shown in (d), so that it behaves like an encoding IC.

In addition, when error flags e and f appear as shown in (b) for the received signal R (X) as shown in FIG. 4a, decoding correction (Correction) is performed to form R '(X) = C (X). do.

But there are too many errors (e) or losses (E) If the inequality is not satisfied, it can be corrected.

As described above, the present invention is a Reed-Solomon error correction code system that can encode and decode as well as error correction and loss correction.

Claims (2)

According to the error flag signal, the missing position signal is also received and the missing position polynomial function ( (x)), the missing polynomial generator 22 to generate and generate roots, an error flag counter 23 for counting the number of error flag signals, and roots for the received signal R (x). The loss polynomial function of the syndrome polynomial function S (x) of the syndrome generator 21 and the missing polynomial generator 22 generated by forming the syndrome polynomial function S (x) from the root of the part 30. ( a multiplication unit 24 multiplying by (x) and a missing position polynomial function of the missing polynomial generator 22 ( (x)) and the multiplication output (S (x)) of the multiplication unit 24 (x) is inputted and the number of error flags is inputted to perform Euclid arithmetic processing. (x)) and an error polynomial function formed by performing a chien search and a funny algorithm 26 by receiving an error size and a position polynomial function through the Euclidean algorithm 25 and the Euclidean algorithm 25. A lead composed of a correction unit 27 which performs an error and a loss correction under the control of the control unit 28 with respect to the signal R (x) sequentially input through the first-in first-out RAM 29 to (E (x)). Solomon error correction code system. 2. The Reed-Solomon error correcting code system of claim 1, wherein the error-loss signal is corrected for an error flag signal to enable encoding and decoding operations.