KR940008234A - Signal integrated circuit - Google Patents
Signal integrated circuit Download PDFInfo
- Publication number
- KR940008234A KR940008234A KR1019930016678A KR930016678A KR940008234A KR 940008234 A KR940008234 A KR 940008234A KR 1019930016678 A KR1019930016678 A KR 1019930016678A KR 930016678 A KR930016678 A KR 930016678A KR 940008234 A KR940008234 A KR 940008234A
- Authority
- KR
- South Korea
- Prior art keywords
- mosfet
- gate
- input
- capacitance
- source
- Prior art date
Links
Abstract
본 발명은 비교적 단순한 회로에 의해 신호의 기중통합을 실현할 수 있는 신호통합회로를 제공하는 것을 목적으로 한다.An object of the present invention is to provide a signal integration circuit which can realize the airborne integration of signals by a relatively simple circuit.
본 발명의 신호통합회로는, 드레인에 전원이 접속되고, 게이트에 복수의 제1커패시턴스가 병렬로 접속된 제1MOSFET와, 각 커패시턴스에 접속된 입력모듀울을 구비하며, 각 입력모듀울은, 소오스가 레지스턴스를 통해 전기한 제1커패시턴스에 접속됨과 아울러 드레인에 입력펄스신호가 입력되고 또 게이트가 제2커패시턴스를 통해 접지된 제2MOSFET와, 소오스가 이 제 2MOSFET의 게이트에 접속됨과 아울러 드레인의 전원에 접속되고 또 게이트에 무게설정펄스신호가 입력되는 제3MOSFET를 구비하고 전기한 제1MOSFET의 게이트에 참조용 톱니파신호가 입력되며, 제1MOSFET의 소오스는 제3커패시턴스를 통해 접지되어 이 소오스로부터 출력펄스신호가 출력된다.A signal integrated circuit according to the present invention includes a first MOSFET having a power source connected to a drain, a plurality of first capacitances connected in parallel to a gate, and an input module connected to each capacitance, wherein each input module has a source. Is connected to the first capacitance, which is electrically connected through the resistance, the input pulse signal is input to the drain, and the gate is connected to the gate of the second MOSFET, and the source is connected to the gate of the second MOSFET. A third MOSFET connected to the gate and having a weight setting pulse signal input thereto; a reference sawtooth signal is input to the gate of the first MOSFET, and the source of the first MOSFET is grounded through a third capacitance to output an output pulse signal Is output.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명에 관한 신호통합회로의 1실시예를 나타내는 회로도.1 is a circuit diagram showing one embodiment of a signal integrated circuit according to the present invention.
제2도는 동실시예의 입력모듀울을 나타내는 회로도.2 is a circuit diagram showing an input module of the same embodiment.
Claims (1)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US26924492A | 1992-09-11 | 1992-09-11 | |
US92-269244 | 1992-09-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR940008234A true KR940008234A (en) | 1994-04-29 |
Family
ID=66817788
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930016678A KR940008234A (en) | 1992-09-11 | 1993-08-26 | Signal integrated circuit |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR940008234A (en) |
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1993
- 1993-08-26 KR KR1019930016678A patent/KR940008234A/en not_active Application Discontinuation
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
N231 | Notification of change of applicant | ||
WITN | Withdrawal due to no request for examination |