KR940004998Y1 - Memory module - Google Patents

Abstract

No content.

Description

Memory module

1 (a) is a front view of a conventional memory module.

Figure 1 (b) is a side view of a conventional memory module.

Figure 2 (a) is a front view of one embodiment of a memory module of the present invention.

Figure 2 (b) is a front view of one embodiment of a memory module of the present invention.

3 is a schematic circuit diagram showing a pattern circuit of a memory module according to the present invention.

* Explanation of symbols for main parts of the drawings

10,20: independent substrate P _{1 to} P ₉ : PLCC type memory chip

11, 21: pin T ₁ -T ₃₀ : terminal

M _{1 to} M ₃ : DIP type memory chip 22: Hole

The present invention relates to a memory module, and more particularly, to an independent memory module that can be three-dimensionally coupled on the main board.

In general, a microcomputer or a personal computer (PC) is a central processing unit capable of accessing a CRT, a printer, or the like, and is equipped with a hard or floppy disk to execute a command and process data as specified by a program. A small computer system consisting of three basic devices (CPU), memory, and input / output interfaces.

The basic components that make up their bodies have been greatly improved in performance in recent years with the rapid development of semiconductor technology, and the size of components has been significantly reduced due to the high density. In other words, architectures are being manufactured to make the most of IC integration at the design time. In addition, this form of development is especially shown in the form of an increase in the number of bits, which is gradually developing from the initial 4 bits to 8 bits, 16 bits, 32 bits data.

As the processing capacity of the central processing unit (hereinafter, referred to as CPU) increases, the expansion capacity of the memory added to the periphery thereof also increases. In general, the memory of the CPU includes data, variables, and intermediate results, RAM which is easy to change contents, and ROM which stores programs or constant tables that are fixed and whose values are not changed. In a small computer system as described above, the size of the attached memory depends on the size of the program or data required for a particular application.

In order to have a suitable memory capacity in a small computer system, it can implement | achieve by using many IC memory unit memory chips. In this case, the memory is typically arranged in two rows of pins symmetrically on the vertical axis of the chip (Dual-in Line Package (hereinafter referred to as DIP)), and is arranged on the substrate. To implement on the board, 9 commercially available 256K × 1 bit DRAM chips are used to configure 8 bits, that is, 1 byte information, which is the smallest unit that a user can process in the storage device, and the remaining 1 Parity check is performed using two data bits. Thus, a plurality of connections of a memory chip composed of 8 bits, that is, 1 byte, are required depending on the number of processing bits of the CPU. For example, in the case of 32 bits, as described above, four memory chip connectors consisting of nine chips and forming eight bits are required. If the memory chip is generally arranged in a plane on the main board, it takes up a large area.

However, in a personal computer or a small computer system, the area of the motherboard cannot be infinitely expanded for the memory configuration.

This is because the advantages of such a small computer system is that it is inexpensive, small in size, easy to use, and large in processing capacity. Therefore, from this point of view, the increase in the area of the main board due to the planar arrangement of the memory chips on the main board was a major obstacle to miniaturization.

In order to solve such a problem, for example, conventionally, as shown in FIG. ₁ , a single independent substrate may be a DRAM (P ₁ -P ₂ ) called PLCC (Plastic Leaded Chip Carrier), which is smaller in size than a DIP type DRAM. An arrangement was made on (10) in units of 1 byte, and the area was reduced by joining the independent substrates onto the main board. That is, _nine 256K × 1 bit PLCC type memory chips (P ₁ -P ₉ ) are arranged on a separate substrate 10 in a line by surface soldering in accordance with the structure of the pins 11 of the PLCC type memory chip. (10) A circuit pattern is formed on the rear surface, and the pattern and the pins are formed by a conductor inside a small hole penetrating the front and rear surfaces of the independent substrate 10 provided in correspondence with the pins of the PLCC type memory chips P ₁ -P ₆ . This could be accessed. Such a pattern is connected to a plurality of terminals (T ₁ -T ₃₀ ) formed in a row on one side of the longitudinal substrate 10 in order to communicate with an external CPU. The independent substrate 10 configured as described above is combined with a corresponding connector installed on the main board, or the long extended terminals T ₁ -T ₃₀ are soldered together at the back of the main board through holes formed on the main board, and the entire main board is formed. By installing them perpendicularly or at an angle to them, the total footprint of the memory is reduced compared to a flat array. However, this type of memory module requires special, expensive equipment for such soldering because of the pin structure of the PLCC type memory chips (P ₁ -P ₃ ) to be soldered on the front surface of the board. Since the gap between chips is small to arrange the chips, manufacturing is difficult, the price is increased, and the yield is also greatly reduced.

Accordingly, an object of the present invention is to solve such a problem and to provide a cheap memory module that is simple in manufacturing, greatly improves yield, and is easily expanded in a small area.

According to the present invention, a memory module includes a substrate having a plurality of holes, a plurality of conductive terminals provided on one side of the substrate, and a plurality of pins extending from the front surface to the rear surface of the substrate through the corresponding holes, respectively. Wherein two memory chips have four bit data input / output pins and one memory chip has at least three DIP type memory chips having one bit data input / output pins, between the pins protruding on the rear surface of the substrate and the conductive terminal. Are electrically connected to each other, and each of the two memory chips is connected to a 4-bit data input / output pin, and each of the memory chips includes a circuit pattern printed on the substrate to be connected to the one-bit data input / output pin.

Hereinafter, described in detail as an embodiment with reference to the accompanying drawings of the present invention.

Figure 2 (a) Figure 2 (b) is a front view and a side view showing a memory module of the present invention. Pin 21 of the memory chip to install two 256K × 4 bit DIP type memory chips (M ₁ , M ₂ ) and one 256K × 1 bit DIP type memory chip (M ₃ ) on an independent substrate 20. The same number of holes 22 as the number is formed, and the pins 21 of the memory chips M _{1 to} M ₃ are inserted through the formed holes 22 to collectively solder on the back surface of the independent substrate 20. do. In addition, thirty conductive terminals T ₁ -T ₃₀ are formed on one side of the independent substrate 20 in the longitudinal direction to communicate the memory on the independent substrate 20 and the CPU on the main substrate. The terminals T ₁ -T ₃₀ surround the one side portion and have a pad shape having a predetermined width. These terminals (T ₁ -T ₃₀₎ and a circuit diagram of a printed pattern on an isolated substrate 20 to connect the terminal 21 of the memory chip (M ₁ -M ₃₎ are shown in FIG. 3.

First, the terminals T ₄ , T ₅ , T ₇ , T ₈ , T ₁₁ , T ₁₂ , T ₁₄ , T ₁₅ , and T ₁₇ of the 30 terminals are connected to each of the memory chips M _{1 to} M _{3 of} FIG. ₃ . It is coupled with nine lines A ₀ -A ₈ that share each level of address lines A ₀ -A ₈ . Terminals T ₃ , T ₆ , T ₁₀ , T ₁₃ , T ₁₆ , T ₂₀ , T ₂₃ , T ₂₅ , T ₂₆ , and T ₂₇ are each data input / output terminal D of each memory chip M ₁ -M ₃ . ₁ -D ₉ , Q ₉ ) and 10 improvement lines, respectively. Terminals T ₁ and T ₃₀ are connected to the power supply (not shown) of each memory chip M ₁ -M ₃ , and terminal T ₂ is connected to the row address strobe terminal (of the memory chips M ₁ , M ₂ ). CAS), and terminals T ₉ and T ₂₂ are connected to ground (not shown) terminals of each memory chip M ₁ -M ₃ . Terminal T ₂₇ is connected to each column address strobe terminal RAS of each memory chip M ₁ -M ₃ . The terminal T ₂₁ is connected to the write enable terminal W of each memory chip M ₁ -M ₃ . The terminal T ₂₈ is connected to the row address strobe terminal CAS ₉ of the memory chip M ₃ . The extra three terminals (T ₁₈ , T ₁₉ , T ₂₄ ) are not connected, but terminal (T ₁₉ ) is connected to the ground terminal of each memory (M ₁ -M ₃ ) for noise prevention, and the rest (T ₁₈ , T ₂₄ ) is used as an expansion pin for memory capacity.

The memory module fabricated in this configuration may be coupled to the main board through a connector at a vertical or constant angle on the main board, or through a hole formed on the main board by having a pin having a terminal extending outward of the independent substrate 10. The terminal pin may be inserted and soldered from the back of the board to be connected. Thus, the operation of the memory module configured in units of 1 byte is common in this field and will not be described.

Therefore, the memory module of the present invention can be soldered collectively on the back side of the board by using the DIP type memory chip, so that no expensive special equipment is required, and the number of chips is reduced by using the memory with the extended data output bits. As a result, the number of pins of the chip is greatly reduced, and the wiring is very simple, greatly reducing the manufacturing cost required to manufacture the memory module, and reducing the inconvenience of changing the entire board to expand the memory capacity. It has a big effect such as shortening the working time and greatly improving the yield.

Claims (3)

A substrate 20 having a plurality of holes 22; A plurality of conductive terminals T _{1 to} T ₃₀ provided on one side of the substrate; Each of the plurality of pins 21 extends from the front side to the rear side of the substrate through the corresponding holes 22, and each of the two memory chips M _{1 to} M ₂ has 4 bit data input / output and a memory chip. 1 (M ₃₎ is 1-bit data input and output pins at least three DIP-type memory chip (M ₁ ~M ₃₎ and having; But the connection between the pin and the conductive terminal projecting rear surface of the substrate in electrical memory chip 2 (M _{2 1} ~M) is 4-bit data input and output pins and the connection, and the memory chip 1, respectively (M ₃₎ Is a memory module including a circuit pattern printed on the substrate connected to the 1-bit data input and output pins. 2. The memory module according to claim 1, wherein the terminals (T _{1 to} T ₃₀ ) respectively surround the one side portion. The memory module of claim 1, wherein the terminals (T _{1 to} T ₃₀ ) protrude outwardly from the one side portion.