KR940004850A - Thin film transistor and its manufacturing method - Google Patents

Abstract

The present invention provides a thin film transistor comprising a gate electrode formed on a substrate, a gate insulating film formed entirely to insulate the gate electrode on the substrate, a semiconductor layer formed on the gate insulating film with a length greater than that of the gate electrode, and a source / drain electrode; In the manufacturing method, a small amount of N-type impurities are added to the source and drain electrode forming material in direct contact with the semiconductor layer to reduce the contact resistance and to remove the ohmic layer forming process, which has been a problem in the conventional thin film transistor. Reducing the number can contribute to process failure and cost reduction.

Description

Thin film transistor and its manufacturing method

Since this is an open matter, no full text was included.

2 (A) and (B) are sectional views showing a preferred embodiment of the thin film transistor according to the present invention.

Claims (8)

A method of manufacturing a thin film transistor comprising a gate electrode formed on a substrate, a gate insulating film formed entirely on the substrate to insulate the gate electrode on the substrate, a semiconductor layer formed on the gate insulating film with a length greater than the gate electrode, and a source / drain electrode. The method according to claim 1, wherein a small amount of impurities are added to the source / drain electrode forming material in direct contact with the semiconductor layer to form a source / drain electrode having a reduced contact resistance with the semiconductor layer. The method of manufacturing a thin film transistor according to claim 1, wherein the source and drain electrodes are made of Cr metal to which a small amount of N-type impurities are added. The method of manufacturing a thin film transistor according to claim 1, wherein an addition amount of impurities added to the source and drain electrodes is 1 wt% or less. The method of claim 1, further comprising an ohmic layer made of n ⁺ a-Si between the semiconductor layer and the source / drain electrodes. A thin film transistor comprising a gate electrode formed on a substrate, a gate insulating film formed entirely on the substrate to insulate the gate electrode on the substrate, a semiconductor layer formed on the gate insulating film with a length greater than that of the gate electrode, and a source / drain electrode. A thin film transistor, characterized in that the source and drain electrodes in direct contact with the semiconductor layer are made of a metal to which a very small amount of N-type impurities are added. 6. The thin film transistor of claim 5, further comprising an ohmic layer composed of n ⁺ a-Si between the semiconductor layer and the source and drain electrodes. 6. The thin film transistor of claim 5, further comprising an insulating etch stopper layer between the semiconductor layer and the source and drain electrodes. The thin film transistor according to claim 5, wherein the source and drain electrodes are made of Cr metal to which antimony (Sb) of 1 wt% or less is added. ※ Note: The disclosure is based on the initial application.