KR940002690A

KR940002690A - One-time input / output data recording system

Info

Publication number: KR940002690A
Application number: KR1019920013717A
Authority: KR
Inventors: 김용식
Original assignee: 이헌조; 주식회사 금성사
Priority date: 1992-07-30
Filing date: 1992-07-30
Publication date: 1994-02-17

Abstract

본 발명은 원타임 입출력데이타 기록 시스템에 관한 것으로, 현재 데이타 처리속도가 느린 입출력 디바이스로 인한 전반적인 시스템 저하를 보완하기 위한 것이다. 이와같은 본 발명은 중앙처리장치의 버스의 정의신호를 분석하여 데이타 판독, 기록 및 데이타의 전환을 결정하고 동작완료신호를 발생하는 버스제어부와, 그 버스제어부의 동작완료신호 및 중앙처리장치의 제어신호를 분석하여 데이타 판독, 기록, 방향전환을 결정하고 중앙처리장치에 동작완료신호를 입력하는 제1로직부와, 상기 버스제어부의 데이타 방향, 판독 및 데이타 기록제어신호에 따라 중앙처리장치의 데이타를 버퍼링하는 데이타버퍼부와, 상기 제1로직부의 데이타 방향, 판독, 데이타 기록제어신호에 따라 데이타버퍼부의 출력 데이타를 저장하고 그 저장된 데이타를 외부로 출력하는 제2로직부로 구성함으로써, 달성되는 것이다.The present invention relates to a one-time input and output data recording system, to compensate for the overall system degradation caused by the current input and output devices with slow data processing speed. As described above, the present invention analyzes a bus definition signal of a central processing unit to determine data reading, writing and data switching, and generates an operation completion signal, a bus completion unit operation completion signal, and a control of the central processing unit. A first logic unit for determining data reading, writing and redirection by analyzing signals and inputting an operation completion signal to the central processing unit, and data of the central processing unit according to the data direction, reading and data writing control signals of the bus control unit; And a second buffer portion for storing the output data of the data buffer portion and outputting the stored data to the outside according to the data direction, read and data write control signals of the first logic portion. .

Description

One-time input / output data recording system

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명 입출력 데이타 기록 시스템 구성도,2 is a block diagram of the present invention input and output data recording system,

제3도는 제2도의 동작설명에 대한 신호 흐름도.3 is a signal flow diagram for explaining the operation of FIG.

Claims

Analyzing the central processing unit 1 for controlling the entire system operation according to the external second operation completion signal, and the definition signal and the control signal of the bus of the central processing unit 1 to perform data reading, writing and switching of data. A bus control unit 2 which determines and outputs a system control signal and an operation completion signal of an input / output device to the outside, an operation completion signal of the bus control unit 2, a control signal of the central processing unit 1, and a bus definition signal. The first logic unit 4 which analyzes the data reading and writing direction, and inputs an operation completion signal to the central processing unit 1, and the data direction, reading and data writing control signals of the bus control unit 2; The data buffer unit 3 buffers data in the central processing unit 1, and the output data of the data buffer unit 3 is stored in accordance with the data direction, read and data write control signals of the first logic unit 4. The stored data A one-time input and output data recording system, including a second logic unit (5) for outputting portion.

※ Note: The disclosure is based on the initial application.