KR940001277A - Manufacturing Method of Semiconductor Device - Google Patents

Manufacturing Method of Semiconductor Device Download PDF

Info

Publication number
KR940001277A
KR940001277A KR1019920010609A KR920010609A KR940001277A KR 940001277 A KR940001277 A KR 940001277A KR 1019920010609 A KR1019920010609 A KR 1019920010609A KR 920010609 A KR920010609 A KR 920010609A KR 940001277 A KR940001277 A KR 940001277A
Authority
KR
South Korea
Prior art keywords
semiconductor device
tungsten
metal wiring
bpsg
film
Prior art date
Application number
KR1019920010609A
Other languages
Korean (ko)
Other versions
KR950007958B1 (en
Inventor
신유균
고광만
김영선
Original Assignee
김광호
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자주식회사 filed Critical 김광호
Priority to KR1019920010609A priority Critical patent/KR950007958B1/en
Publication of KR940001277A publication Critical patent/KR940001277A/en
Application granted granted Critical
Publication of KR950007958B1 publication Critical patent/KR950007958B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 텅스텐을 이용한 금속배선공정에서 금소배선 하부의 BPSG막에 보이드가 생성되는 것을 방지하는 방법에 관한 것이다.The present invention relates to a method of preventing voids from being generated in a BPSG film under a gold wiring in a metal wiring process using tungsten.

본 발명에 의하면, 텅스텐을 이용하여 금속배선을 형성하는 반도데장치의 제조방법에 있어서, 반도체소자가 형서된 반도체기판상에 BPSG막을 형성한 다음 상기 BPSG막 위에 열응력이 낮은 막으로 밀착층을 형성하고 상기 밀착층위에 텅스텐금속배선을 형성한 후, 다시 BPSG를 증착하고 플로우시키는 것을 특징으로 하는 반도체장치의 제조방법이 제공된다.According to the present invention, in the method of manufacturing a bandode device for forming a metal wiring using tungsten, a BPSG film is formed on a semiconductor substrate on which a semiconductor device is formed, and then an adhesion layer is formed on the BPSG film with a film having a low thermal stress. After forming and forming a tungsten metal wiring on the adhesion layer, there is provided a semiconductor device manufacturing method characterized in that the deposition and flow of BPSG again.

따라서, 열응력이 낮은 막을 밀착층으로 사용하여 텅스텐금속배선배선을 형성함으로써 텅스텐의 열응력을 완화시켜 금속배선 하부의 BPSG에 보이드가 생성되는 것을 방지할 수 있는 반도체소자의 신뢰성 향상을 도모할 수 있다.Therefore, by forming a tungsten metal wiring by using a film having a low thermal stress as an adhesive layer, it is possible to reduce the thermal stress of tungsten and to improve the reliability of the semiconductor device which can prevent the formation of voids in the BPSG under the metal wiring. have.

Description

반도체장치의 제조방법Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 금속배선구조를 도시한 단면도.2 is a cross-sectional view showing a metal wiring structure of the present invention.

제3도는 본 발명의 일실시예를 도시한 단면도.3 is a cross-sectional view showing an embodiment of the present invention.

Claims (2)

텅스텐을 이용하여 금속배선을 형성하는 반도체장치의 제조방법에 있어서, 반도체소자가 형성된 반도체기판상에 BPSG막을 형성한 다음 상기 BPSG막위에 열응력이 낮은 막으로 밀착층을 형성하고 상기 밀착층위에 텅스텐금속배선을 형성한 후, 다시 BPSG를 증착하고 플로우시키는 것을 특징으로 하는 반도체장치의 제조방법.In the method of manufacturing a semiconductor device using tungsten to form a metal wiring, a BPSG film is formed on a semiconductor substrate on which a semiconductor element is formed, and then a close contact layer is formed on the BPSG film with a low thermal stress film, and the tungsten is deposited on the tight contact layer. After forming the metal wiring, the method of manufacturing a semiconductor device, characterized in that to deposit and flow again BPSG. 제1항에 있어서, 상기 밀착층은 폴리실리콘, TiSi2또는 폴리실리콘/TiN, 폴리실리콘/TiSi2, 폴리실리콘/WSi2등의 단일막 또는 이중막으로 형성함을 특징으로 하는 반도체장치의 제조방법.The semiconductor device of claim 1, wherein the adhesion layer is formed of a single layer or a double layer of polysilicon, TiSi 2 or polysilicon / TiN, polysilicon / TiSi 2 , polysilicon / WSi 2 , or the like. Way. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920010609A 1992-06-18 1992-06-18 Fabricating method of semiconductor device KR950007958B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920010609A KR950007958B1 (en) 1992-06-18 1992-06-18 Fabricating method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920010609A KR950007958B1 (en) 1992-06-18 1992-06-18 Fabricating method of semiconductor device

Publications (2)

Publication Number Publication Date
KR940001277A true KR940001277A (en) 1994-01-11
KR950007958B1 KR950007958B1 (en) 1995-07-21

Family

ID=19334884

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920010609A KR950007958B1 (en) 1992-06-18 1992-06-18 Fabricating method of semiconductor device

Country Status (1)

Country Link
KR (1) KR950007958B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100301425B1 (en) * 1999-06-22 2001-11-01 박종섭 Method of fabricating semicondutor device of W-polycide structure

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101595546B1 (en) * 2014-10-07 2016-02-19 동국대학교 산학협력단 Apparatus, method and program for measuring visual fatigue

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100301425B1 (en) * 1999-06-22 2001-11-01 박종섭 Method of fabricating semicondutor device of W-polycide structure

Also Published As

Publication number Publication date
KR950007958B1 (en) 1995-07-21

Similar Documents

Publication Publication Date Title
KR880004551A (en) Semiconductor devices
KR900005589A (en) Semiconductor integrated circuit device and manufacturing method thereof
KR950009926A (en) Metal wiring formation method of semiconductor device
KR940001277A (en) Manufacturing Method of Semiconductor Device
KR950021526A (en) Semiconductor device and manufacturing method thereof
KR970052243A (en) Metal wiring formation method of semiconductor device
KR950021108A (en) Metal wiring formation method of semiconductor device
KR970052928A (en) Corrosion prevention metal wiring formation method of semiconductor device
KR950025868A (en) Bit line formation method of semiconductor device
KR970072313A (en) Method of wiring semiconductor thin film
KR960005797A (en) Semiconductor Device Wiring Formation Method
KR970052242A (en) Metal wiring formation method of semiconductor device
KR950021425A (en) How to Form Multilayer Metal Wiring
KR930024105A (en) Aluminum metal wiring formation method of silicon semiconductor device using tungsten nitride thin film as barrier metal
KR970077199A (en) Method for forming wiring layer of semiconductor device
KR970003535A (en) Contact manufacturing method of semiconductor device
KR970052186A (en) Semiconductor device manufacturing method
KR930024100A (en) Metal wiring formation method of semiconductor device
KR970053527A (en) Metal wiring formation method of semiconductor device
KR960030326A (en) Metal wiring formation method of semiconductor device
KR950021065A (en) Metal wiring formation method of semiconductor device
KR970018231A (en) Metal wiring manufacturing method
KR970052920A (en) Metal wiring formation method of semiconductor device
KR910019193A (en) Corrosion prevention wiring formation method of semiconductor device
KR920010864A (en) How to Form Flattened Metal Wiring

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20060630

Year of fee payment: 12

LAPS Lapse due to unpaid annual fee