KR940000304Y1 - Baking system of semiconductor device fabricating process - Google Patents
Baking system of semiconductor device fabricating process Download PDFInfo
- Publication number
- KR940000304Y1 KR940000304Y1 KR2019900022396U KR900022396U KR940000304Y1 KR 940000304 Y1 KR940000304 Y1 KR 940000304Y1 KR 2019900022396 U KR2019900022396 U KR 2019900022396U KR 900022396 U KR900022396 U KR 900022396U KR 940000304 Y1 KR940000304 Y1 KR 940000304Y1
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- wafer
- heating
- baking system
- semiconductor device
- fabricating process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67115—Apparatus for thermal treatment mainly by radiation
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- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
내용 없음.No content.
Description
도면은 본 고안의 구성른 나타낸 평면도.Figure is a plan view showing the configuration of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 본체 2 : 조작반1: body 2: control panel
3 : 버튼 4, 4' : 로드아암3: Button 4, 4 ': Load Arm
5, 5' : 카세트 엘리베이터 6 : 가열통5, 5 ': Cassette elevator 6: Heater
7 : 가열판 8 : PR코터7: heating plate 8: PR coater
9 : PR 코팅시일드 10 : 회전판9: PR coating seal 10: rotating plate
11, 12 : IR 히터 13 : 트랜스퍼아암11, 12: IR heater 13: transfer arm
본 고안은 반도체 제조장치중의 하나인 가열장치(Bake system)를 보완 개선하여 웨이퍼의 온도감쇠를 감소시킴으로서 웨이퍼의 파손방지, 특히 열적충격에 약한 크리스탈계통 웨이퍼의 파손을 방지하기 위한 베이크 시스템에 관한 것이다The present invention provides a bake system for preventing wafer breakage, particularly for crystalline wafers, which are not susceptible to thermal shock, by complementing and improving the baking system, which is one of the semiconductor manufacturing apparatuses. will be
종래 반도체 제조장치중 코팅기와 현상액을 적용하여 가열판을 사용한 베이크 시스템은 실리콘 웨이퍼에만 적합하도록 제작되었고 또한 가열판과 온도세팅장치로만 주로 구성되어 있기 때문에 웨이퍼 가열시 가열판과 대기의 온도차가 극심하게 차이가 나므로서 크리스탈 계통의 웨이퍼와 같이 열적충격에 약한 웨이퍼는 급격한 온고의 하강으로 파손의 발생율이 빈번하고 이로 인하여 공정의 안정성에 저해가 되는 문제점이 발생하고 있는 실정이다.In the conventional semiconductor manufacturing apparatus, the baking system using the heating plate by applying the coating machine and the developing solution is manufactured to be suitable only for the silicon wafer, and mainly consists only of the heating plate and the temperature setting device. Wafers that are weak to thermal shocks, such as crystal-based wafers, suffer from frequent problems of breakage due to a rapid drop in temperature, thereby impairing the stability of the process.
따라서 상기와 같은 문제점을 해결, 보완하기 위하여 안출된 본 고안에서는 열적충격에 의한 웨이퍼의 파손을 방지할 수 있도록 가열판의 웨이퍼 투입구와 웨이퍼 인출구에 특수 적외선 전구로 웨이퍼를 가열하여 과잉용제를 기화시키는 IR히터를 사용 장치한 것으로 이하, 첨부도면에 의거 구성을 상세히 설명하면 다음과 같다.Therefore, the present invention devised to solve and supplement the above problems, IR to vaporize the excess solvent by heating the wafer with a special infrared bulb in the wafer inlet and wafer outlet of the heating plate to prevent the wafer from being damaged by thermal shock Hereinafter, a configuration using the heater will be described in detail with reference to the accompanying drawings.
본체(1)에 버튼(3)이 배열된 조작반(2)과 로드아암(4), (4') 및 카세트엘레베이터(5), (5') 그리고 가열판(7)이 내장되어 투입구(6')와 인출구(6")가 형성된 가열통(6)이 상호 인접설치되고 또 PR 코터(8)에 연결되어 회전판(10)을 내장하면서 인입구(9')와 인출구(9")가 형성된 PR코팅시일드(9)가 가열통(6)에 근접 설치된 것에 있어서, 상기 가열통(6)과 로드아암(4) 사이, 또 가열통(6)과 PR코팅시일드(9)사이에 IR 히터(11), (12)와 트랜스퍼아암(13)을 설치한 구성으로 도면중 미설명부호는 웨이퍼(14)이다.The control panel 2 having the buttons 3 arranged in the main body 1, the load arms 4, 4 ', the cassette elevators 5, 5', and the heating plate 7 are built-in, and the inlet 6 ' ) And the heating tube 6 having the outlet 6 "are installed adjacent to each other and connected to the PR coater 8 to embed the rotating plate 10, and the PR coating having the inlet 9 'and the outlet 9" is formed. In the case where the seal 9 is provided close to the heating vessel 6, an IR heater (between the heating vessel 6 and the load arm 4 and between the heating vessel 6 and the PR coating shield 9) 11), (12) and transfer arm 13 are provided, and the reference numerals in the drawings denote wafer 14.
상기와 같이 구성된 본 고안의 작용효과를 상술하면 우선 다수의 웨이퍼(14)를 카세트 엘리베이터(5)에 내장하고 조작반(2)의 필요한 버튼(3)을 눌러서 내장된 웨이퍼(14)중에서 최상의 위치에 있는 웨이퍼(14)가 로드아암(4)과 수평이 되도록 카세트 엘리베이터(5)의 높이를 조정한 다음 재차 필요한 버튼(3)을 누르면 로드아암(4)의 전진으로 최상의 웨이퍼(14)는 가열통(6)의 투입구(6')를 통과 내장되면서 가열판(7)의 하부에 위치하게 되는데 이때 가열판(7)내부의 온도는 통상 70℃의 상태를 유지하고 IR 히터(11) 부위의 온도는 45℃의 분위기를 유지하면서 상온의 상태에 있던 웨이퍼(14)가 IR 히터(11)부위를 통과 예열이 되어 가열판(7)에 도달하면 급격한 온도상승에 따른 변화의 충격을 예방할 수 있게 되는 것이다.Referring to the operation and effect of the present invention configured as described above, first, a plurality of wafers 14 are embedded in the cassette elevator 5, and the required button 3 of the operation panel 2 is pressed to the best position among the embedded wafers 14. Adjust the height of the cassette elevator 5 so that the wafer 14 is flush with the load arm 4 and then press the required button 3 again to advance the load arm 4 so that the best wafer 14 is heated. While passing through the inlet (6 ') of the (6) is placed in the lower portion of the heating plate (7) at this time, the temperature inside the heating plate (7) is usually maintained at a state of 70 ℃ and the temperature of the IR heater 11 portion 45 When the wafer 14, which is in the state of room temperature while maintaining the atmosphere at 占 폚, is preheated through the IR heater 11, and reaches the heating plate 7, it is possible to prevent the shock of the change caused by the rapid temperature rise.
다음으로 가열통(6) 내부에서 적절히 가열된 웨이퍼(14)는 버튼(3)의 작동으로 트랜스퍼아암(13)에 의하여 투입구(6')를 통과 PR코팅시일드(9) 내부하면의 회전판(10)상에 안착되고 PR코터(8)로부터 감광막(Photoresist)이 분출, 회전판(10)에 안착된 웨이퍼(14)의 중심에 떨어지면서 회전판(14)의 회전과 함께 원심력으로 감광막(미도시됨)은 웨이퍼(14)의 상면에 균일하게 도포되는 것이다.Next, the wafer 14 properly heated in the heating tube 6 passes through the inlet 6 'by the transfer arm 13 by the operation of the button 3 and the rotating plate on the inner surface of the PR coating shield 9 ( The photoresist is ejected from the PR coater 8 and falls to the center of the wafer 14 seated on the rotating plate 10 while being placed on the rotating plate 10. ) Is uniformly applied to the upper surface of the wafer 14.
여기서 감광막의 도포가 원활하고 안정성있게 이루어지는 것은 상기 가열통(6)으로부터 배출된 웨이퍼(14)가 45℃ 분위기의 IR히터(12) 부위를 통과하면서 온도의 급강하 없이 필요한 온도를 유지시켜 주므로 웨이퍼의 감광막 도포가 안정성 있게 정착되는 것이다.The application of the photosensitive film is smooth and stable because the wafer 14 discharged from the heating vessel 6 maintains the required temperature without sudden drop in temperature while passing through the IR heater 12 in the 45 ° C atmosphere. The photoresist coating is stably fixed.
따라서 감광막의 도포가 완료된 웨이퍼는 PR코팅시일드(9)의 인출구(9")를 통과하면서 로드아암(4')에 의하여 카세트 엘리베이터(5')로 이송, 취출되는 것이다.Therefore, the wafer on which the photosensitive film is applied is transferred and taken out to the cassette elevator 5 'by the load arm 4' while passing through the outlet 9 "of the PR coating shield 9.
상기와 같이 된 본 고안은 가열판의 웨이퍼 투입구와 웨이퍼 인출구 부위에 웨이퍼를 가열하는 IR 히터를 장착함으로써 웨이퍼의 급격한 온도변화와 충격을 방지하고 열적 충격에 의한 웨이퍼 특히 크리스탈 계통 웨이퍼의 파손을 미연에 방지함으로써 불량률감소와 함께 공정의 안정성에 기여하는 유용한 고안이다.The present invention as described above is equipped with an IR heater for heating the wafer at the wafer inlet and the wafer outlet of the heating plate to prevent the rapid temperature change and impact of the wafer, and to prevent the damage of the wafer, especially the crystal-based wafer due to thermal shock in advance. This is a useful design that contributes to the stability of the process together with the reduction of the defective rate.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019900022396U KR940000304Y1 (en) | 1990-12-31 | 1990-12-31 | Baking system of semiconductor device fabricating process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019900022396U KR940000304Y1 (en) | 1990-12-31 | 1990-12-31 | Baking system of semiconductor device fabricating process |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR920013683U KR920013683U (en) | 1992-07-27 |
| KR940000304Y1 true KR940000304Y1 (en) | 1994-01-19 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019900022396U KR940000304Y1 (en) | 1990-12-31 | 1990-12-31 | Baking system of semiconductor device fabricating process |
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| KR (1) | KR940000304Y1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20000030079A (en) * | 1999-10-18 | 2000-06-05 | 김명규 | Structure of chuck to catch semiconductor weiper |
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1990
- 1990-12-31 KR KR2019900022396U patent/KR940000304Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
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| KR920013683U (en) | 1992-07-27 |
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